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| author | Sean Wilson <spwilson2@wisc.edu> | 2017-06-07 12:13:16 -0500 |
|---|---|---|
| committer | Sean Wilson <spwilson2@wisc.edu> | 2017-06-20 18:03:21 +0000 |
| commit | ebe5f0df9a6158ec4ed84429d1619f388eb1388b (patch) | |
| tree | c3070d745a0820856a044313860c8edede236be8 /src/cpu/simple | |
| parent | 8421362cc23a6341e44ce59f2c4f578438fd8a55 (diff) | |
| download | gem5-ebe5f0df9a6158ec4ed84429d1619f388eb1388b.tar.xz | |
cpu, gpu-compute: Replace EventWrapper use with EventFunctionWrapper
Change-Id: Idd5992463bcf9154f823b82461070d1f1842cea3
Signed-off-by: Sean Wilson <spwilson2@wisc.edu>
Reviewed-on: https://gem5-review.googlesource.com/3746
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/cpu/simple')
| -rw-r--r-- | src/cpu/simple/timing.cc | 2 | ||||
| -rw-r--r-- | src/cpu/simple/timing.hh | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 1c468dc99..d2cb6ee21 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -80,7 +80,7 @@ TimingSimpleCPU::TimingCPUPort::TickEvent::schedule(PacketPtr _pkt, Tick t) TimingSimpleCPU::TimingSimpleCPU(TimingSimpleCPUParams *p) : BaseSimpleCPU(p), fetchTranslation(this), icachePort(this), dcachePort(this), ifetch_pkt(NULL), dcache_pkt(NULL), previousCycle(0), - fetchEvent(this) + fetchEvent([this]{ fetch(); }, name()) { _status = Idle; } diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index eebf884ca..8498630b4 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -159,7 +159,8 @@ class TimingSimpleCPU : public BaseSimpleCPU public: TimingCPUPort(const std::string& _name, TimingSimpleCPU* _cpu) - : MasterPort(_name, _cpu), cpu(_cpu), retryRespEvent(this) + : MasterPort(_name, _cpu), cpu(_cpu), + retryRespEvent([this]{ sendRetryResp(); }, name()) { } protected: @@ -176,7 +177,7 @@ class TimingSimpleCPU : public BaseSimpleCPU void schedule(PacketPtr _pkt, Tick t); }; - EventWrapper<MasterPort, &MasterPort::sendRetryResp> retryRespEvent; + EventFunctionWrapper retryRespEvent; }; class IcachePort : public TimingCPUPort @@ -315,8 +316,7 @@ class TimingSimpleCPU : public BaseSimpleCPU private: - typedef EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch> FetchEvent; - FetchEvent fetchEvent; + EventFunctionWrapper fetchEvent; struct IprEvent : Event { Packet *pkt; |