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| author | Anthony Gutierrez <atgutier@umich.edu> | 2012-06-05 14:20:13 -0400 |
|---|---|---|
| committer | Anthony Gutierrez <atgutier@umich.edu> | 2012-06-05 14:20:13 -0400 |
| commit | d6da3ff3175c54ba904f6e561bd4b23f52ddf84d (patch) | |
| tree | e61bae4a2df3caccfd1dfb6a8d375952388b4f44 /src/cpu/simple | |
| parent | 20d25b9da77cc681ef7d5bb101438bc0b0c6827c (diff) | |
| download | gem5-d6da3ff3175c54ba904f6e561bd4b23f52ddf84d.tar.xz | |
cpu: Don't init simple and inorder CPUs if they are defered.
initCPU() will be called to initialize switched out CPUs for the simple and
inorder CPU models. this patch prevents those CPUs from being initialized
because they should get their state from the active CPU when it is switched
out.
Diffstat (limited to 'src/cpu/simple')
| -rw-r--r-- | src/cpu/simple/atomic.cc | 2 | ||||
| -rw-r--r-- | src/cpu/simple/timing.cc | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index f12c2c174..0886b276f 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -86,7 +86,7 @@ AtomicSimpleCPU::init() // Initialise the ThreadContext's memory proxies tcBase()->initMemProxies(tcBase()); - if (FullSystem) { + if (FullSystem && !params()->defer_registration) { ThreadID size = threadContexts.size(); for (ThreadID i = 0; i < size; ++i) { ThreadContext *tc = threadContexts[i]; diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 3d771e56b..bae40eba4 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -68,7 +68,7 @@ TimingSimpleCPU::init() // Initialise the ThreadContext's memory proxies tcBase()->initMemProxies(tcBase()); - if (FullSystem) { + if (FullSystem && !params()->defer_registration) { for (int i = 0; i < threadContexts.size(); ++i) { ThreadContext *tc = threadContexts[i]; // initialize CPU, including PC |