Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults

--HG--
extra : convert_revision : 1cef0734462ee2e4db12482462c2ab3c134d3675

1 files changed, 4 insertions, 4 deletions

diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 1d208b8df..5c8d569bb 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -288,17 +288,17 @@ class BaseSimpleCPU : public BaseCPU
         return thread->readMiscReg(misc_reg);
     }
 
-    MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault)
+    MiscReg readMiscRegWithEffect(int misc_reg)
     {
-        return thread->readMiscRegWithEffect(misc_reg, fault);
+        return thread->readMiscRegWithEffect(misc_reg);
     }
 
-    Fault setMiscReg(int misc_reg, const MiscReg &val)
+    void setMiscReg(int misc_reg, const MiscReg &val)
     {
         return thread->setMiscReg(misc_reg, val);
     }
 
-    Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val)
+    void setMiscRegWithEffect(int misc_reg, const MiscReg &val)
     {
         return thread->setMiscRegWithEffect(misc_reg, val);
     }