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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2009-04-20 18:54:02 -0700 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2009-04-20 18:54:02 -0700 |
| commit | 3083268d60ba28cf011eadd6d6e4f400e6686cc3 (patch) | |
| tree | 7dbd37a140a59acacaf46101b7ea1e8fb5a8dbfe /src/cpu/simple | |
| parent | 7f8ea68a309790821d81500d1ba15d4ceef25933 (diff) | |
| download | gem5-3083268d60ba28cf011eadd6d6e4f400e6686cc3.tar.xz | |
request: rename INST_READ to INST_FETCH.
Diffstat (limited to 'src/cpu/simple')
| -rw-r--r-- | src/cpu/simple/base.cc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index 71d26f828..5058db0da 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -48,6 +48,7 @@ #include "cpu/static_inst.hh" #include "cpu/thread_context.hh" #include "mem/packet.hh" +#include "mem/request.hh" #include "sim/byteswap.hh" #include "sim/debug.hh" #include "sim/host.hh" @@ -280,7 +281,7 @@ BaseSimpleCPU::copy(Addr dest) memReq->dest = dest_addr; memReq->size = 64; memReq->time = curTick; - memReq->flags &= ~INST_READ; + memReq->flags &= ~INST_FETCH; dcacheInterface->access(memReq); } } @@ -346,7 +347,7 @@ BaseSimpleCPU::setupFetchRequest(Request *req) #endif Addr fetchPC = (threadPC & PCMask) + fetchOffset; - req->setVirt(0, fetchPC, sizeof(MachInst), 0, threadPC); + req->setVirt(0, fetchPC, sizeof(MachInst), Request::INST_FETCH, threadPC); } |