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author | Marc Orr <morr@cs.wisc.edu> | 2014-11-06 05:42:22 -0600 |
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committer | Marc Orr <morr@cs.wisc.edu> | 2014-11-06 05:42:22 -0600 |
commit | bf80734b2ce080cd75f4b57be47e37465e8901f1 (patch) | |
tree | 0ba9cbba64cd017e95b5a3f637d58435208ebc3c /src/cpu/simple | |
parent | 3947f88d0fa35d2134fa3e999e05bb184a01e396 (diff) | |
download | gem5-bf80734b2ce080cd75f4b57be47e37465e8901f1.tar.xz |
x86 isa: This patch attempts an implementation at mwait.
Mwait works as follows:
1. A cpu monitors an address of interest (monitor instruction)
2. A cpu calls mwait - this loads the cache line into that cpu's cache.
3. The cpu goes to sleep.
4. When another processor requests write permission for the line, it is
evicted from the sleeping cpu's cache. This eviction is forwarded to the
sleeping cpu, which then wakes up.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
Diffstat (limited to 'src/cpu/simple')
-rw-r--r-- | src/cpu/simple/atomic.cc | 12 | ||||
-rw-r--r-- | src/cpu/simple/base.cc | 2 | ||||
-rw-r--r-- | src/cpu/simple/base.hh | 8 | ||||
-rw-r--r-- | src/cpu/simple/timing.cc | 14 | ||||
-rw-r--r-- | src/cpu/simple/timing.hh | 5 |
5 files changed, 41 insertions, 0 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index d6dbb9292..e98da3ea7 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -272,6 +272,12 @@ AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(PacketPtr pkt) DPRINTF(SimpleCPU, "received snoop pkt for addr:%#x %s\n", pkt->getAddr(), pkt->cmdString()); + // X86 ISA: Snooping an invalidation for monitor/mwait + AtomicSimpleCPU *cpu = (AtomicSimpleCPU *)(&owner); + if(cpu->getAddrMonitor()->doMonitor(pkt)) { + cpu->wakeup(); + } + // if snoop invalidates, release any associated locks if (pkt->isInvalidate()) { DPRINTF(SimpleCPU, "received invalidation for addr:%#x\n", @@ -288,6 +294,12 @@ AtomicSimpleCPU::AtomicCPUDPort::recvFunctionalSnoop(PacketPtr pkt) DPRINTF(SimpleCPU, "received snoop pkt for addr:%#x %s\n", pkt->getAddr(), pkt->cmdString()); + // X86 ISA: Snooping an invalidation for monitor/mwait + AtomicSimpleCPU *cpu = (AtomicSimpleCPU *)(&owner); + if(cpu->getAddrMonitor()->doMonitor(pkt)) { + cpu->wakeup(); + } + // if snoop invalidates, release any associated locks if (pkt->isInvalidate()) { DPRINTF(SimpleCPU, "received invalidation for addr:%#x\n", diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index 60ab53999..636e08899 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -347,6 +347,8 @@ BaseSimpleCPU::dbg_vtophys(Addr addr) void BaseSimpleCPU::wakeup() { + getAddrMonitor()->gotWakeup = true; + if (thread->status() != ThreadContext::Suspended) return; diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh index 8f38a33c8..523bc9776 100644 --- a/src/cpu/simple/base.hh +++ b/src/cpu/simple/base.hh @@ -462,6 +462,14 @@ class BaseSimpleCPU : public BaseCPU, public ExecContext private: TheISA::PCState pred_pc; + + public: + // monitor/mwait funtions + void armMonitor(Addr address) { BaseCPU::armMonitor(address); } + bool mwait(PacketPtr pkt) { return BaseCPU::mwait(pkt); } + void mwaitAtomic(ThreadContext *tc) + { return BaseCPU::mwaitAtomic(tc, thread->dtb); } + AddressMonitor *getAddrMonitor() { return BaseCPU::getCpuAddrMonitor(); } }; #endif // __CPU_SIMPLE_BASE_HH__ diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 84a2c09fd..5bfc9799d 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -58,6 +58,8 @@ #include "sim/full_system.hh" #include "sim/system.hh" +#include "debug/Mwait.hh" + using namespace std; using namespace TheISA; @@ -818,9 +820,21 @@ TimingSimpleCPU::updateCycleCounts() void TimingSimpleCPU::DcachePort::recvTimingSnoopReq(PacketPtr pkt) { + // X86 ISA: Snooping an invalidation for monitor/mwait + if(cpu->getAddrMonitor()->doMonitor(pkt)) { + cpu->wakeup(); + } TheISA::handleLockedSnoop(cpu->thread, pkt, cacheBlockMask); } +void +TimingSimpleCPU::DcachePort::recvFunctionalSnoop(PacketPtr pkt) +{ + // X86 ISA: Snooping an invalidation for monitor/mwait + if(cpu->getAddrMonitor()->doMonitor(pkt)) { + cpu->wakeup(); + } +} bool TimingSimpleCPU::DcachePort::recvTimingResp(PacketPtr pkt) diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 84c8f7418..52eb6b1ba 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -228,11 +228,16 @@ class TimingSimpleCPU : public BaseSimpleCPU * a wakeup event on a cpu that is monitoring an address */ virtual void recvTimingSnoopReq(PacketPtr pkt); + virtual void recvFunctionalSnoop(PacketPtr pkt); virtual bool recvTimingResp(PacketPtr pkt); virtual void recvRetry(); + virtual bool isSnooping() const { + return true; + } + struct DTickEvent : public TickEvent { DTickEvent(TimingSimpleCPU *_cpu) |