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author | Ali Saidi <saidi@eecs.umich.edu> | 2007-10-31 01:21:54 -0400 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-10-31 01:21:54 -0400 |
commit | 538fae951b3a594814dff6bb6d038c32caadb25c (patch) | |
tree | a74245aab941fe20309c108d2e837e68ea5e4582 /src/cpu/simple | |
parent | 8ce31ea471eebb06efa590fb060804aa1fb5266b (diff) | |
download | gem5-538fae951b3a594814dff6bb6d038c32caadb25c.tar.xz |
Traceflags: Add SCons function to created a traceflag instead of having one file with them all.
--HG--
extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
Diffstat (limited to 'src/cpu/simple')
-rw-r--r-- | src/cpu/simple/SConscript | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/simple/SConscript b/src/cpu/simple/SConscript index ccccab2b5..c090a938c 100644 --- a/src/cpu/simple/SConscript +++ b/src/cpu/simple/SConscript @@ -41,5 +41,9 @@ if 'TimingSimpleCPU' in env['CPU_MODELS']: SimObject('TimingSimpleCPU.py') Source('timing.cc') +if 'AtomicSimpleCPU' in env['CPU_MODELS'] or \ + 'TimingSimpleCPU' in env['CPU_MODELS']: + TraceFlag('SimpleCPU') + if need_simple_base: Source('base.cc') |