summaryrefslogtreecommitdiff
path: root/src/cpu/simple
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2009-02-25 10:15:44 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-25 10:15:44 -0800
commit5605079b1f20bc7f6a4a80c8d1e4daabe7125270 (patch)
tree29dfa1685e3e257e3857ef7f9672778d43582440 /src/cpu/simple
parenta1aba01a02a8c1261120de83d8fbfd6624f0cb17 (diff)
downloadgem5-5605079b1f20bc7f6a4a80c8d1e4daabe7125270.tar.xz
ISA: Replace the translate functions in the TLBs with translateAtomic.
Diffstat (limited to 'src/cpu/simple')
-rw-r--r--src/cpu/simple/atomic.cc4
-rw-r--r--src/cpu/simple/base.cc2
-rw-r--r--src/cpu/simple/timing.cc2
3 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index cd07a9fe3..7a1cf71c4 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -314,7 +314,7 @@ AtomicSimpleCPU::read(Addr addr, T &data, unsigned flags)
req->setVirt(0, addr, dataSize, flags, thread->readPC());
// translate to physical address
- Fault fault = thread->dtb->translate(req, tc, false);
+ Fault fault = thread->dtb->translateAtomic(req, tc, false);
// Now do the access.
if (fault == NoFault) {
@@ -452,7 +452,7 @@ AtomicSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
req->setVirt(0, addr, dataSize, flags, thread->readPC());
// translate to physical address
- Fault fault = thread->dtb->translate(req, tc, true);
+ Fault fault = thread->dtb->translateAtomic(req, tc, true);
// Now do the access.
if (fault == NoFault) {
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index f9fa8d835..ddeb9a7c8 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -347,7 +347,7 @@ BaseSimpleCPU::setupFetchRequest(Request *req)
Addr fetchPC = (threadPC & PCMask) + fetchOffset;
req->setVirt(0, fetchPC, sizeof(MachInst), 0, threadPC);
- Fault fault = thread->itb->translate(req, tc);
+ Fault fault = thread->itb->translateAtomic(req, tc);
return fault;
}
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 844eccc75..65222266e 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -314,7 +314,7 @@ TimingSimpleCPU::buildSplitPacket(PacketPtr &pkt1, PacketPtr &pkt2,
Fault
TimingSimpleCPU::buildPacket(PacketPtr &pkt, RequestPtr &req, bool read)
{
- Fault fault = thread->dtb->translate(req, tc, !read);
+ Fault fault = thread->dtb->translateAtomic(req, tc, !read);
MemCmd cmd;
if (fault != NoFault) {
delete req;