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| author | Kevin Lim <ktlim@umich.edu> | 2006-07-05 15:57:02 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-07-05 15:57:02 -0400 |
| commit | ae78c465313d6ca1dc71e8b9731e952bb3c8c09b (patch) | |
| tree | d763adc9330c3ed7c8a805532ae13a3ca10dc862 /src/cpu/simple | |
| parent | e41fd9cb6309083c32a2795e3ac449628138d441 (diff) | |
| download | gem5-ae78c465313d6ca1dc71e8b9731e952bb3c8c09b.tar.xz | |
Need to change state upon quiescing.
--HG--
extra : convert_revision : 25e3b0a463a0191cab9290665409d0abca6a179a
Diffstat (limited to 'src/cpu/simple')
| -rw-r--r-- | src/cpu/simple/timing.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 0729f9489..ab4acdeda 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -118,6 +118,7 @@ TimingSimpleCPU::quiesce(Event *quiesce_event) // an access to complete. if (status() == Idle || status() == Running || status() == SwitchedOut) { DPRINTF(Config, "Ready to quiesce\n"); + changeState(SimObject::QuiescedTiming); return false; } else { DPRINTF(Config, "Waiting to quiesce\n"); |