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| author | Ali Saidi <saidi@eecs.umich.edu> | 2008-10-20 16:22:59 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2008-10-20 16:22:59 -0400 |
| commit | b760b99f4d9f5469d88c67ae8a06e5f9543a43e7 (patch) | |
| tree | 39cb41ec58be172c0f4b65162ae637be42bbabb0 /src/cpu/simple | |
| parent | 4fac54f227f0ee0ee169955cb2510609434f7d85 (diff) | |
| download | gem5-b760b99f4d9f5469d88c67ae8a06e5f9543a43e7.tar.xz | |
O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Removing hwrei causes
the instruction after the hwrei to be fetched before the ITB/DTB_CM register is updated in a call pal
call sys and thus the translation fails because the user is attempting to access a super page address.
Minimally, it seems as though some sort of fetch stall or refetch after a hwrei is required. I think
this works currently because the hwrei uses the exec context interface, and the o3 stalls when that occurs.
Additionally, these changes don't update the LOCK register and probably break ll/sc. Both o3 changes were
removed since a great deal of manual patching would be required to only remove the hwrei change.
Diffstat (limited to 'src/cpu/simple')
| -rw-r--r-- | src/cpu/simple/base.hh | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh index 03c20a6f2..b7fcf1708 100644 --- a/src/cpu/simple/base.hh +++ b/src/cpu/simple/base.hh @@ -413,7 +413,9 @@ class BaseSimpleCPU : public BaseCPU //Fault CacheOp(uint8_t Op, Addr EA); #if FULL_SYSTEM + Fault hwrei() { return thread->hwrei(); } void ev5_trap(Fault fault) { fault->invoke(tc); } + bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); } #else void syscall(int64_t callnum) { thread->syscall(callnum); } #endif |