cpu,isa,mem: Add per-thread wakeup logic

Changes wakeup functionality so that only specific threads on SMT
capable cpus are woken.

4 files changed, 13 insertions, 14 deletions

diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 2d9da2587..77706966b 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -140,7 +140,7 @@ AtomicSimpleCPU::threadSnoop(PacketPtr pkt, ThreadID sender)
     for (ThreadID tid = 0; tid < numThreads; tid++) {
         if (tid != sender) {
             if(getCpuAddrMonitor(tid)->doMonitor(pkt)) {
-                wakeup();
+                wakeup(tid);
             }
 
             TheISA::handleLockedSnoop(threadInfo[tid]->thread,
@@ -287,7 +287,7 @@ AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(PacketPtr pkt)
 
     for (ThreadID tid = 0; tid < cpu->numThreads; tid++) {
         if (cpu->getCpuAddrMonitor(tid)->doMonitor(pkt)) {
-            cpu->wakeup();
+            cpu->wakeup(tid);
         }
     }
 
@@ -313,7 +313,7 @@ AtomicSimpleCPU::AtomicCPUDPort::recvFunctionalSnoop(PacketPtr pkt)
     AtomicSimpleCPU *cpu = (AtomicSimpleCPU *)(&owner);
     for (ThreadID tid = 0; tid < cpu->numThreads; tid++) {
         if(cpu->getCpuAddrMonitor(tid)->doMonitor(pkt)) {
-            cpu->wakeup();
+            cpu->wakeup(tid);
         }
     }
 
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index b0810517f..4d5ddebb2 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -416,14 +416,13 @@ BaseSimpleCPU::dbg_vtophys(Addr addr)
 }
 
 void
-BaseSimpleCPU::wakeup()
+BaseSimpleCPU::wakeup(ThreadID tid)
 {
-    for (ThreadID tid = 0; tid < numThreads; tid++) {
-        getCpuAddrMonitor(tid)->gotWakeup = true;
-        if (threadInfo[tid]->thread->status() == ThreadContext::Suspended) {
-            DPRINTF(Quiesce,"Suspended Processor awoke\n");
-            threadInfo[tid]->thread->activate();
-        }
+    getCpuAddrMonitor(tid)->gotWakeup = true;
+
+    if (threadInfo[tid]->thread->status() == ThreadContext::Suspended) {
+        DPRINTF(Quiesce,"[tid:%d] Suspended Processor awoke\n", tid);
+        threadInfo[tid]->thread->activate();
     }
 }
 
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index c108cb986..1fcd5c203 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -93,7 +93,7 @@ class BaseSimpleCPU : public BaseCPU
   public:
     BaseSimpleCPU(BaseSimpleCPUParams *params);
     virtual ~BaseSimpleCPU();
-    void wakeup();
+    void wakeup(ThreadID tid) M5_ATTR_OVERRIDE;
     virtual void init();
   public:
     Trace::InstRecord *traceData;
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index f3241f7e5..6d67f610b 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -545,7 +545,7 @@ TimingSimpleCPU::threadSnoop(PacketPtr pkt, ThreadID sender)
     for (ThreadID tid = 0; tid < numThreads; tid++) {
         if (tid != sender) {
             if(getCpuAddrMonitor(tid)->doMonitor(pkt)) {
-                wakeup();
+                wakeup(tid);
             }
             TheISA::handleLockedSnoop(threadInfo[tid]->thread, pkt,
                     dcachePort.cacheBlockMask);
@@ -865,7 +865,7 @@ TimingSimpleCPU::DcachePort::recvTimingSnoopReq(PacketPtr pkt)
 {
     for (ThreadID tid = 0; tid < cpu->numThreads; tid++) {
         if (cpu->getCpuAddrMonitor(tid)->doMonitor(pkt)) {
-            cpu->wakeup();
+            cpu->wakeup(tid);
         }
     }
 
@@ -879,7 +879,7 @@ TimingSimpleCPU::DcachePort::recvFunctionalSnoop(PacketPtr pkt)
 {
     for (ThreadID tid = 0; tid < cpu->numThreads; tid++) {
         if(cpu->getCpuAddrMonitor(tid)->doMonitor(pkt)) {
-            cpu->wakeup();
+            cpu->wakeup(tid);
         }
     }
 }