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authorKorey Sewell <ksewell@umich.edu>2010-01-31 18:25:48 -0500
committerKorey Sewell <ksewell@umich.edu>2010-01-31 18:25:48 -0500
commite8312ab6f700b31dfa357607ab51c9c05014572d (patch)
treecabc2520a8cd933d63983f596b77f33bbfd807c8 /src/cpu/simple_thread.cc
parenta892af7b261e1c48b06ccbded5551e958c778414 (diff)
downloadgem5-e8312ab6f700b31dfa357607ab51c9c05014572d.tar.xz
inorder: switch out buffer
add buffer for instructions to switch out to in a pipeline stage can't squash the instruction and remove the pipeline so we kind of need to 'suspend' an instruction at the stage while the memory stall resolves for the switch on cache miss model
Diffstat (limited to 'src/cpu/simple_thread.cc')
0 files changed, 0 insertions, 0 deletions