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authorGabe Black <gabeblack@google.com>2018-10-18 17:34:08 -0700
committerGabe Black <gabeblack@google.com>2019-01-22 21:15:45 +0000
commit230b892fa3f484a46f4cd77f889f8793416b91e2 (patch)
tree53b32ed7120d019399e36d04655487745bbba9ee /src/cpu/simple_thread.hh
parent774770a6410abb129e2a19de1ca50d7c0c311fef (diff)
downloadgem5-230b892fa3f484a46f4cd77f889f8793416b91e2.tar.xz
arch: cpu: Stop passing around misc registers by reference.
These values are all basic integers (specifically uint64_t now), and so passing them by const & is actually less efficient since there's a extra level of indirection and an extra value, and the same sized value (a 64 bit pointer vs. a 64 bit int) is being passed around. Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3 Reviewed-on: https://gem5-review.googlesource.com/c/13626 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/cpu/simple_thread.hh')
-rw-r--r--src/cpu/simple_thread.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 073f7ab2c..211a4c89f 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -489,13 +489,13 @@ class SimpleThread : public ThreadState
}
void
- setMiscRegNoEffect(int misc_reg, const RegVal &val, ThreadID tid = 0)
+ setMiscRegNoEffect(int misc_reg, RegVal val, ThreadID tid = 0)
{
return isa->setMiscRegNoEffect(misc_reg, val);
}
void
- setMiscReg(int misc_reg, const RegVal &val, ThreadID tid = 0)
+ setMiscReg(int misc_reg, RegVal val, ThreadID tid = 0)
{
return isa->setMiscReg(misc_reg, val, tc);
}