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authorGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:21 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:21 -0700
commit43345bff6c4ee2fd5a35760776898eefa690329e (patch)
treeabab8a0c414f7d1053f987530cfcbe0ae4974d03 /src/cpu/simple_thread.hh
parent1b29f1621d714c6dc0f2ab921f12e9eb1dbfcd46 (diff)
downloadgem5-43345bff6c4ee2fd5a35760776898eefa690329e.tar.xz
Registers: Move the PCs out of the ISAs and into the CPUs.
Diffstat (limited to 'src/cpu/simple_thread.hh')
-rw-r--r--src/cpu/simple_thread.hh43
1 files changed, 37 insertions, 6 deletions
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 35a28dbb6..31e69bafe 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -107,6 +107,28 @@ class SimpleThread : public ThreadState
TheISA::IntReg intRegs[TheISA::NumIntRegs];
TheISA::ISA isa; // one "instance" of the current ISA.
+ /** The current microcode pc for the currently executing macro
+ * operation.
+ */
+ MicroPC microPC;
+
+ /** The next microcode pc for the currently executing macro
+ * operation.
+ */
+ MicroPC nextMicroPC;
+
+ /** The current pc.
+ */
+ Addr PC;
+
+ /** The next pc.
+ */
+ Addr nextPC;
+
+ /** The next next pc.
+ */
+ Addr nextNPC;
+
public:
// pointer to CPU associated with this SimpleThread
BaseCPU *cpu;
@@ -232,6 +254,9 @@ class SimpleThread : public ThreadState
void clearArchRegs()
{
regs.clear();
+ microPC = 0;
+ nextMicroPC = 1;
+ PC = nextPC = nextNPC = 0;
memset(intRegs, 0, sizeof(intRegs));
memset(floatRegs.i, 0, sizeof(floatRegs.i));
}
@@ -283,12 +308,12 @@ class SimpleThread : public ThreadState
uint64_t readPC()
{
- return regs.readPC();
+ return PC;
}
void setPC(uint64_t val)
{
- regs.setPC(val);
+ PC = val;
}
uint64_t readMicroPC()
@@ -303,12 +328,12 @@ class SimpleThread : public ThreadState
uint64_t readNextPC()
{
- return regs.readNextPC();
+ return nextPC;
}
void setNextPC(uint64_t val)
{
- regs.setNextPC(val);
+ nextPC = val;
}
uint64_t readNextMicroPC()
@@ -323,12 +348,18 @@ class SimpleThread : public ThreadState
uint64_t readNextNPC()
{
- return regs.readNextNPC();
+#if ISA_HAS_DELAY_SLOT
+ return nextNPC;
+#else
+ return nextPC + sizeof(TheISA::MachInst);
+#endif
}
void setNextNPC(uint64_t val)
{
- regs.setNextNPC(val);
+#if ISA_HAS_DELAY_SLOT
+ nextNPC = val;
+#endif
}
MiscReg