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author | Korey Sewell <ksewell@umich.edu> | 2007-11-13 16:58:16 -0500 |
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committer | Korey Sewell <ksewell@umich.edu> | 2007-11-13 16:58:16 -0500 |
commit | 269259004943b80916ec9b6354f2fc00c811c88b (patch) | |
tree | 4a01b0300aef6692a787f85d42280a1dbdb086e6 /src/cpu/simple_thread.hh | |
parent | 422ab8bec0034a6b703578ec2c92350c6382875a (diff) | |
download | gem5-269259004943b80916ec9b6354f2fc00c811c88b.tar.xz |
Add in files from merge-bare-iron, get them compiling in FS and SE mode
--HG--
extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
Diffstat (limited to 'src/cpu/simple_thread.hh')
-rw-r--r-- | src/cpu/simple_thread.hh | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index 2b79c9708..cccb53322 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -368,6 +368,10 @@ class SimpleThread : public ThreadState void setStCondFailures(unsigned sc_failures) { storeCondFailures = sc_failures; } + void setShadowSet(int css, int tid=0) { + regs.setShadowSet(css); + } + #if !FULL_SYSTEM TheISA::IntReg getSyscallArg(int i) { |