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author | Gabe Black <gblack@eecs.umich.edu> | 2009-02-27 09:22:14 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-02-27 09:22:14 -0800 |
commit | 9a000c51736d97c1109be296ea7d1fd41d84debb (patch) | |
tree | 9fbc6648a69d4f6156c4259d7f1e32bd7732405e /src/cpu/simple_thread.hh | |
parent | 60aab03e854c0d955127d12c63f4c99a36d19d80 (diff) | |
download | gem5-9a000c51736d97c1109be296ea7d1fd41d84debb.tar.xz |
Processes: Make getting and setting system call arguments part of a process object.
Diffstat (limited to 'src/cpu/simple_thread.hh')
-rw-r--r-- | src/cpu/simple_thread.hh | 28 |
1 files changed, 0 insertions, 28 deletions
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index 4eba493c3..73929d362 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -34,7 +34,6 @@ #include "arch/isa_traits.hh" #include "arch/regfile.hh" -#include "arch/syscallreturn.hh" #include "arch/tlb.hh" #include "config/full_system.hh" #include "cpu/thread_context.hh" @@ -367,33 +366,6 @@ class SimpleThread : public ThreadState { storeCondFailures = sc_failures; } #if !FULL_SYSTEM - TheISA::IntReg getSyscallArg(int i) - { - assert(i < TheISA::NumArgumentRegs); - TheISA::IntReg val = regs.readIntReg( - TheISA::flattenIntIndex(getTC(), TheISA::ArgumentReg[i])); -#if THE_ISA == SPARC_ISA - if (bits(this->readMiscRegNoEffect( - SparcISA::MISCREG_PSTATE), 3, 3)) { - val = bits(val, 31, 0); - } -#endif - return val; - } - - // used to shift args for indirect syscall - void setSyscallArg(int i, TheISA::IntReg val) - { - assert(i < TheISA::NumArgumentRegs); - regs.setIntReg(TheISA::flattenIntIndex(getTC(), - TheISA::ArgumentReg[i]), val); - } - - void setSyscallReturn(SyscallReturn return_value) - { - TheISA::setSyscallReturn(return_value, getTC()); - } - void syscall(int64_t callnum) { process->syscall(callnum, tc); |