Decode: Pull instruction decoding out of the StaticInst class into its own.

This change pulls the instruction decoding machinery (including caches) out of
the StaticInst class and puts it into its own class. This has a few intrinsic
benefits. First, the StaticInst code, which has gotten to be quite large, gets
simpler. Second, the code that handles decode caching is now separated out
into its own component and can be looked at in isolation, making it easier to
understand. I took the opportunity to restructure the code a bit which will
hopefully also help.

Beyond that, this change also lays some ground work for each ISA to have its
own, potentially stateful decode object. We'd be able to include less
contextualizing information in the ExtMachInst objects since that context
would be applied at the decoder. Also, the decoder could "know" ahead of time
that all the instructions it's going to see are going to be, for instance, 64
bit mode, and it will have one less thing to check when it decodes them.
Because the decode caching mechanism has been separated out, it's now possible
to have multiple caches which correspond to different types of decoding
context. Having one cache for each element of the cross product of different
configurations may become prohibitive, so it may be desirable to clear out the
cache when relatively static state changes and not to have one for each
setting.

Because the decode function is no longer universally accessible as a static
member of the StaticInst class, a new function was added to the ThreadContexts
that returns the applicable decode object.

1 files changed, 0 insertions, 196 deletions

diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index c41ac38a6..b2773052e 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -34,10 +34,8 @@
 #include <bitset>
 #include <string>
 
-#include "arch/isa_traits.hh"
 #include "arch/registers.hh"
 #include "arch/types.hh"
-#include "base/hashmap.hh"
 #include "base/misc.hh"
 #include "base/refcnt.hh"
 #include "base/types.hh"
@@ -65,7 +63,6 @@ class AtomicSimpleCPU;
 class TimingSimpleCPU;
 class InorderCPU;
 class SymbolTable;
-class AddrDecodePage;
 
 namespace Trace {
     class InstRecord;
@@ -285,9 +282,6 @@ class StaticInstPtr;
 class StaticInst : public StaticInstBase
 {
   public:
-
-    /// Binary machine instruction type.
-    typedef TheISA::MachInst MachInst;
     /// Binary extended machine instruction type.
     typedef TheISA::ExtMachInst ExtMachInst;
     /// Logical register index type.
@@ -416,72 +410,8 @@ class StaticInst : public StaticInstBase
     virtual const std::string &disassemble(Addr pc,
         const SymbolTable *symtab = 0) const;
 
-    /// Decoded instruction cache type.
-    /// For now we're using a generic hash_map; this seems to work
-    /// pretty well.
-    typedef m5::hash_map<ExtMachInst, StaticInstPtr> DecodeCache;
-
-    /// A cache of decoded instruction objects.
-    static DecodeCache decodeCache;
-
-    /**
-     * Dump some basic stats on the decode cache hash map.
-     * Only gets called if DECODE_CACHE_HASH_STATS is defined.
-     */
-    static void dumpDecodeCacheStats();
-
-    /// Decode a machine instruction.
-    /// @param mach_inst The binary instruction to decode.
-    /// @retval A pointer to the corresponding StaticInst object.
-    //This is defined as inlined below.
-    static StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
-
     /// Return name of machine instruction
     std::string getName() { return mnemonic; }
-
-    /// Decoded instruction cache type, for address decoding.
-    /// A generic hash_map is used.
-    typedef m5::hash_map<Addr, AddrDecodePage *> AddrDecodeCache;
-
-    /// A cache of decoded instruction objects from addresses.
-    static AddrDecodeCache addrDecodeCache;
-
-    struct cacheElement
-    {
-        Addr page_addr;
-        AddrDecodePage *decodePage;
-
-        cacheElement() : decodePage(NULL) { }
-    };
-
-    /// An array of recently decoded instructions.
-    // might not use an array if there is only two elements
-    static struct cacheElement recentDecodes[2];
-
-    /// Updates the recently decoded instructions entries
-    /// @param page_addr The page address recently used.
-    /// @param decodePage Pointer to decoding page containing the decoded
-    ///                   instruction.
-    static inline void
-    updateCache(Addr page_addr, AddrDecodePage *decodePage)
-    {
-        recentDecodes[1].page_addr = recentDecodes[0].page_addr;
-        recentDecodes[1].decodePage = recentDecodes[0].decodePage;
-        recentDecodes[0].page_addr = page_addr;
-        recentDecodes[0].decodePage = decodePage;
-    }
-
-    /// Searches the decoded instruction cache for instruction decoding.
-    /// If it is not found, then we decode the instruction.
-    /// Otherwise, we get the instruction from the cache and move it into
-    /// the address-to-instruction decoding page.
-    /// @param mach_inst The binary instruction to decode.
-    /// @param addr The address that contained the binary instruction.
-    /// @param decodePage Pointer to decoding page containing the instruction.
-    /// @retval A pointer to the corresponding StaticInst object.
-    //This is defined as inlined below.
-    static StaticInstPtr searchCache(ExtMachInst mach_inst, Addr addr,
-                                     AddrDecodePage *decodePage);
 };
 
 typedef RefCountingPtr<StaticInstBase> StaticInstBasePtr;
@@ -510,13 +440,6 @@ class StaticInstPtr : public RefCountingPtr<StaticInst>
     {
     }
 
-    /// Construct directly from machine instruction.
-    /// Calls StaticInst::decode().
-    explicit StaticInstPtr(TheISA::ExtMachInst mach_inst, Addr addr)
-        : RefCountingPtr<StaticInst>(StaticInst::decode(mach_inst, addr))
-    {
-    }
-
     /// Convert to pointer to StaticInstBase class.
     operator const StaticInstBasePtr()
     {
@@ -524,123 +447,4 @@ class StaticInstPtr : public RefCountingPtr<StaticInst>
     }
 };
 
-/// A page of a list of decoded instructions from an address.
-class AddrDecodePage
-{
-  typedef TheISA::ExtMachInst ExtMachInst;
-  protected:
-    StaticInstPtr instructions[TheISA::PageBytes];
-    bool valid[TheISA::PageBytes];
-    Addr lowerMask;
-
-  public:
-    /// Constructor
-    AddrDecodePage()
-    {
-        lowerMask = TheISA::PageBytes - 1;
-        memset(valid, 0, TheISA::PageBytes);
-    }
-
-    /// Checks if the instruction is already decoded and the machine
-    /// instruction in the cache matches the current machine instruction
-    /// related to the address
-    /// @param mach_inst The binary instruction to check
-    /// @param addr The address containing the instruction
-    bool
-    decoded(ExtMachInst mach_inst, Addr addr)
-    {
-        return (valid[addr & lowerMask] &&
-                (instructions[addr & lowerMask]->machInst == mach_inst));
-    }
-
-    /// Returns the instruction object. decoded should be called first
-    /// to check if the instruction is valid.
-    /// @param addr The address of the instruction.
-    /// @retval A pointer to the corresponding StaticInst object.
-    StaticInstPtr
-    getInst(Addr addr)
-    {
-        return instructions[addr & lowerMask];
-    }
-
-    /// Inserts a pointer to a StaticInst object into the list of decoded
-    /// instructions on the page.
-    /// @param addr The address of the instruction.
-    /// @param si A pointer to the corresponding StaticInst object.
-    void
-    insert(Addr addr, StaticInstPtr &si)
-    {
-        instructions[addr & lowerMask] = si;
-        valid[addr & lowerMask] = true;
-    }
-};
-
-
-inline StaticInstPtr
-StaticInst::decode(StaticInst::ExtMachInst mach_inst, Addr addr)
-{
-#ifdef DECODE_CACHE_HASH_STATS
-    // Simple stats on decode hash_map.  Turns out the default
-    // hash function is as good as anything I could come up with.
-    const int dump_every_n = 10000000;
-    static int decodes_til_dump = dump_every_n;
-
-    if (--decodes_til_dump == 0) {
-        dumpDecodeCacheStats();
-        decodes_til_dump = dump_every_n;
-    }
-#endif
-
-    Addr page_addr = addr & ~(TheISA::PageBytes - 1);
-
-    // checks recently decoded addresses
-    if (recentDecodes[0].decodePage &&
-        page_addr == recentDecodes[0].page_addr) {
-        if (recentDecodes[0].decodePage->decoded(mach_inst, addr))
-            return recentDecodes[0].decodePage->getInst(addr);
-
-        return searchCache(mach_inst, addr, recentDecodes[0].decodePage);
-    }
-
-    if (recentDecodes[1].decodePage &&
-        page_addr == recentDecodes[1].page_addr) {
-        if (recentDecodes[1].decodePage->decoded(mach_inst, addr))
-            return recentDecodes[1].decodePage->getInst(addr);
-
-        return searchCache(mach_inst, addr, recentDecodes[1].decodePage);
-    }
-
-    // searches the page containing the address to decode
-    AddrDecodeCache::iterator iter = addrDecodeCache.find(page_addr);
-    if (iter != addrDecodeCache.end()) {
-        updateCache(page_addr, iter->second);
-        if (iter->second->decoded(mach_inst, addr))
-            return iter->second->getInst(addr);
-
-        return searchCache(mach_inst, addr, iter->second);
-    }
-
-    // creates a new object for a page of decoded instructions
-    AddrDecodePage *decodePage = new AddrDecodePage;
-    addrDecodeCache[page_addr] = decodePage;
-    updateCache(page_addr, decodePage);
-    return searchCache(mach_inst, addr, decodePage);
-}
-
-inline StaticInstPtr
-StaticInst::searchCache(ExtMachInst mach_inst, Addr addr,
-                        AddrDecodePage *decodePage)
-{
-    DecodeCache::iterator iter = decodeCache.find(mach_inst);
-    if (iter != decodeCache.end()) {
-        decodePage->insert(addr, iter->second);
-        return iter->second;
-    }
-
-    StaticInstPtr si = TheISA::decodeInst(mach_inst);
-    decodePage->insert(addr, si);
-    decodeCache[mach_inst] = si;
-    return si;
-}
-
 #endif // __CPU_STATIC_INST_HH__