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authorGabe Black <gblack@eecs.umich.edu>2008-10-12 16:59:55 -0700
committerGabe Black <gblack@eecs.umich.edu>2008-10-12 16:59:55 -0700
commitc9ea0b73492bf116c836c54199898f29d9664bc0 (patch)
tree3490b28e25623c49be123d50cf2004ffe1a83e01 /src/cpu/static_inst.hh
parent2736086d7c67a24d9eb87827a22a2b352e342ba2 (diff)
downloadgem5-c9ea0b73492bf116c836c54199898f29d9664bc0.tar.xz
CPU: Make the highest order bit in the micro pc determine if it's combinational or from the ROM.
Diffstat (limited to 'src/cpu/static_inst.hh')
-rw-r--r--src/cpu/static_inst.hh20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index 8a1b3e749..c9eb6ff24 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -74,6 +74,26 @@ namespace Trace {
typedef uint32_t MicroPC;
+static const MicroPC MicroPCRomBit = 1 << (sizeof(MicroPC) * 8 - 1);
+
+static inline MicroPC
+romMicroPC(MicroPC upc)
+{
+ return upc | MicroPCRomBit;
+}
+
+static inline MicroPC
+normalMicroPC(MicroPC upc)
+{
+ return upc & ~MicroPCRomBit;
+}
+
+static inline bool
+isRomMicroPC(MicroPC upc)
+{
+ return MicroPCRomBit & upc;
+}
+
/**
* Base, ISA-independent static instruction class.
*