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authorKorey Sewell <ksewell@umich.edu>2009-05-12 15:01:16 -0400
committerKorey Sewell <ksewell@umich.edu>2009-05-12 15:01:16 -0400
commitdb2b72138052ad96d808d8286bd2598c96f96a31 (patch)
treee2290ee7614146f869e7dde2d1978b47b10fc743 /src/cpu/static_inst.hh
parent3a057bdbb10a265fb36f7827cd06142ad1624530 (diff)
downloadgem5-db2b72138052ad96d808d8286bd2598c96f96a31.tar.xz
inorder-tlb-cunit: merge the TLB as implicit to any memory access
TLBUnit no longer used and we also get rid of memAccSize and memAccFlags functions added to ISA and StaticInst since TLB is not a separate resource to acquire. Instead, TLB access is done before any read/write to memory and the result is checked before it's sent out to memory. * * *
Diffstat (limited to 'src/cpu/static_inst.hh')
-rw-r--r--src/cpu/static_inst.hh2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index cb32f2333..1dc148ce6 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -419,8 +419,6 @@ class StaticInst : public StaticInstBase
*/
bool hasBranchTarget(Addr pc, ThreadContext *tc, Addr &tgt) const;
- virtual Request::Flags memAccFlags();
-
/**
* Return string representation of disassembled instruction.
* The default version of this function will call the internal