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author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-12-07 16:19:57 -0800 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-12-07 16:19:57 -0800 |
commit | e681c0f7b30f521805ebec04271435306f4c56ed (patch) | |
tree | 4b060d7175b0d90c9d4a731d0cad304b60dac029 /src/cpu/static_inst.hh | |
parent | 719f9a6d4fba16af38dcfd62b25a4d708156699f (diff) | |
download | gem5-e681c0f7b30f521805ebec04271435306f4c56ed.tar.xz |
O3: Support squashing all state after special instruction
For SPARC ASIs are added to the ExtMachInst. If the ASI is changed simply
marking the instruction as Serializing isn't enough beacuse that only
stops rename. This provides a mechanism to squash all the instructions
and refetch them
Diffstat (limited to 'src/cpu/static_inst.hh')
-rw-r--r-- | src/cpu/static_inst.hh | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh index e08cbcdb6..15ac444ae 100644 --- a/src/cpu/static_inst.hh +++ b/src/cpu/static_inst.hh @@ -158,7 +158,7 @@ class StaticInstBase : public RefCounted //This flag doesn't do anything yet IsMicroBranch, ///< This microop branches within the microcode for a macroop IsDspOp, - + IsSquashAfter, ///< Squash all uncommitted state after executed NumFlags }; @@ -248,6 +248,7 @@ class StaticInstBase : public RefCounted flags[IsSerializeAfter]; } bool isSerializeBefore() const { return flags[IsSerializeBefore]; } bool isSerializeAfter() const { return flags[IsSerializeAfter]; } + bool isSquashAfter() const { return flags[IsSquashAfter]; } bool isMemBarrier() const { return flags[IsMemBarrier]; } bool isWriteBarrier() const { return flags[IsWriteBarrier]; } bool isNonSpeculative() const { return flags[IsNonSpeculative]; } |