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authorGabe Black <gblack@eecs.umich.edu>2007-07-31 17:34:08 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-07-31 17:34:08 -0700
commit4bdabe1254a8ad9bb960f57eb35cec919b370de8 (patch)
tree318b34065ed9eb3f30852fee11eb398a92134652 /src/cpu/static_inst.hh
parent55ade789d34e541cc538c7c5a4f286a313cfd8ba (diff)
downloadgem5-4bdabe1254a8ad9bb960f57eb35cec919b370de8.tar.xz
Add a flag to indicate an instruction triggers a syscall in SE mode.
--HG-- extra : convert_revision : 1d0b3afdd8254f5b2fb4bbff1fa4a0536f78bb06
Diffstat (limited to 'src/cpu/static_inst.hh')
-rw-r--r--src/cpu/static_inst.hh4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index b0a19c151..f32b61ee5 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -143,6 +143,9 @@ class StaticInstBase : public RefCounted
IsIprAccess, ///< Accesses IPRs
IsUnverifiable, ///< Can't be verified by a checker
+ IsSyscall, ///< Causes a system call to be emulated in syscall
+ /// emulation mode.
+
//Flags for microcode
IsMacroop, ///< Is a macroop containing microops
IsMicroop, ///< Is a microop
@@ -243,6 +246,7 @@ class StaticInstBase : public RefCounted
bool isQuiesce() const { return flags[IsQuiesce]; }
bool isIprAccess() const { return flags[IsIprAccess]; }
bool isUnverifiable() const { return flags[IsUnverifiable]; }
+ bool isSyscall() const { return flags[IsSyscall]; }
bool isMacroop() const { return flags[IsMacroop]; }
bool isMicroop() const { return flags[IsMicroop]; }
bool isDelayedCommit() const { return flags[IsDelayedCommit]; }