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authorAli Saidi <saidi@eecs.umich.edu>2007-01-16 19:06:05 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-01-16 19:06:05 -0500
commitecfd628ecd394f8e7df654ffc7c342d959e12e15 (patch)
treed8d7740c4472718cea0f93bb4cbf04eff9e71421 /src/cpu/static_inst.hh
parent9d04510869fe66d59a168660925a8387c0fba1b8 (diff)
downloadgem5-ecfd628ecd394f8e7df654ffc7c342d959e12e15.tar.xz
Modify ISA and staticInst to support a IsFirstMicroOp flag
Increment instruction count on first micro-op instead of last src/arch/sparc/isa/decoder.isa: Implement a twin load for ASI_LDTX_P(0xe2) src/arch/sparc/isa/formats/mem/blockmem.isa: set the new flag IsFirstMicroOp when needed src/cpu/simple/atomic.cc: Increment instruction count on first micro-op instead of last (because if we take a fault on a micro coded instruction it should be counted twice acording to legion) src/cpu/static_inst.hh: Add IsFirstMicroop flag to static insts --HG-- extra : convert_revision : 02bea93d38c03bbafe4570665eb4c01c11caa2fc
Diffstat (limited to 'src/cpu/static_inst.hh')
-rw-r--r--src/cpu/static_inst.hh2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index 523cfae40..5928eea76 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -146,6 +146,7 @@ class StaticInstBase : public RefCounted
IsMicroOp, ///< Is a microop
IsDelayedCommit, ///< This microop doesn't commit right away
IsLastMicroOp, ///< This microop ends a microop sequence
+ IsFirstMicroOp, ///< This microop begins a microop sequence
//This flag doesn't do anything yet
IsMicroBranch, ///< This microop branches within the microcode for a macroop
@@ -244,6 +245,7 @@ class StaticInstBase : public RefCounted
bool isMicroOp() const { return flags[IsMicroOp]; }
bool isDelayedCommit() const { return flags[IsDelayedCommit]; }
bool isLastMicroOp() const { return flags[IsLastMicroOp]; }
+ bool isFirstMicroOp() const { return flags[IsFirstMicroOp]; }
//This flag doesn't do anything yet
bool isMicroBranch() const { return flags[IsMicroBranch]; }
//@}