Ruby: Simplify tester ports by not using SimpleTimingPort

This patch simplfies the master ports used by RubyDirectedTester and
RubyTester by avoiding the use of SimpleTimingPort. Neither tester
made any use of the functionality offered by SimpleTimingPort besides
a trivial implementation of recvFunctional (only snoops) and
recvRangeChange (not relevant since there is only one master).

The patch does not change or add any functionality, it merely makes
the introduction of a master/slave port easier (in a future patch).

1 files changed, 6 insertions, 3 deletions

diff --git a/src/cpu/testers/directedtest/RubyDirectedTester.hh b/src/cpu/testers/directedtest/RubyDirectedTester.hh
index 53c389692..cd0632976 100644
--- a/src/cpu/testers/directedtest/RubyDirectedTester.hh
+++ b/src/cpu/testers/directedtest/RubyDirectedTester.hh
@@ -47,14 +47,15 @@ class DirectedGenerator;
 class RubyDirectedTester : public MemObject
 {
   public:
-    class CpuPort : public SimpleTimingPort
+    class CpuPort : public Port
     {
       private:
         RubyDirectedTester *tester;
 
       public:
-        CpuPort(const std::string &_name, RubyDirectedTester *_tester, uint32_t _idx)
-            : SimpleTimingPort(_name, _tester), tester(_tester), idx(_idx)
+        CpuPort(const std::string &_name, RubyDirectedTester *_tester,
+                uint32_t _idx)
+            : Port(_name, _tester), tester(_tester), idx(_idx)
         {}
 
         uint32_t idx;
@@ -62,6 +63,8 @@ class RubyDirectedTester : public MemObject
       protected:
         virtual bool recvTiming(PacketPtr pkt);
         virtual Tick recvAtomic(PacketPtr pkt);
+        virtual void recvFunctional(PacketPtr pkt) { }
+        virtual void recvRangeChange() { }
     };
 
     typedef RubyDirectedTesterParams Params;