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authorAndreas Hansson <andreas.hansson@arm.com>2012-02-24 11:43:53 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2012-02-24 11:43:53 -0500
commit1031b824b975cec999c37cabc8c05c485a4ae5ca (patch)
tree18af5987accd59781642001849908ddb486d069a /src/cpu/testers/directedtest
parent9f07d2ce7ecf435b9a1946f15fb3491bb4636637 (diff)
downloadgem5-1031b824b975cec999c37cabc8c05c485a4ae5ca.tar.xz
MEM: Move port creation to the memory object(s) construction
This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
Diffstat (limited to 'src/cpu/testers/directedtest')
-rw-r--r--src/cpu/testers/directedtest/RubyDirectedTester.cc34
1 files changed, 23 insertions, 11 deletions
diff --git a/src/cpu/testers/directedtest/RubyDirectedTester.cc b/src/cpu/testers/directedtest/RubyDirectedTester.cc
index b85cf781c..4518066eb 100644
--- a/src/cpu/testers/directedtest/RubyDirectedTester.cc
+++ b/src/cpu/testers/directedtest/RubyDirectedTester.cc
@@ -1,4 +1,16 @@
/*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
* Copyright (c) 2009-2010 Advanced Micro Devices, Inc.
* All rights reserved.
@@ -40,6 +52,12 @@ RubyDirectedTester::RubyDirectedTester(const Params *p)
{
m_requests_completed = 0;
+ // create the ports
+ for (int i = 0; i < p->port_cpuPort_connection_count; ++i) {
+ ports.push_back(new CpuPort(csprintf("%s-port%d", name(), i),
+ this, i));
+ }
+
// add the check start event to the event queue
schedule(directedStartEvent, 1);
}
@@ -61,21 +79,15 @@ Port *
RubyDirectedTester::getPort(const std::string &if_name, int idx)
{
if (if_name != "cpuPort") {
- panic("RubyDirectedTester::getPort: unknown port %s requested", if_name);
+ panic("RubyDirectedTester::getPort: unknown port %s requested",
+ if_name);
}
- if (idx >= (int)ports.size()) {
- ports.resize(idx + 1);
+ if (idx >= static_cast<int>(ports.size())) {
+ panic("RubyDirectedTester::getPort: unknown index %d requested\n", idx);
}
- if (ports[idx] != NULL) {
- panic("RubyDirectedTester::getPort: port %d already assigned", idx);
- }
-
- CpuPort *port = new CpuPort(csprintf("%s-port%d", name(), idx), this, idx);
-
- ports[idx] = port;
- return port;
+ return ports[idx];
}
Tick