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author | Gabe Black <gblack@eecs.umich.edu> | 2012-01-16 04:27:10 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2012-01-16 04:27:10 -0800 |
commit | da2a4acc26ba264c3c4a12495776fd6a1c4fb133 (patch) | |
tree | f142100388b9d1403492c97b0d323728ce18ef8a /src/cpu/testers/directedtest | |
parent | 241cc0c8402f1b9f2ec20d1cc152d96930959b2a (diff) | |
parent | a7394ad6807bd5e85f680184bf308673ca00534a (diff) | |
download | gem5-da2a4acc26ba264c3c4a12495776fd6a1c4fb133.tar.xz |
Merge yet again with the main repository.
Diffstat (limited to 'src/cpu/testers/directedtest')
6 files changed, 12 insertions, 12 deletions
diff --git a/src/cpu/testers/directedtest/DirectedGenerator.hh b/src/cpu/testers/directedtest/DirectedGenerator.hh index 904dcf399..c156efff0 100644 --- a/src/cpu/testers/directedtest/DirectedGenerator.hh +++ b/src/cpu/testers/directedtest/DirectedGenerator.hh @@ -43,7 +43,7 @@ class DirectedGenerator : public SimObject virtual ~DirectedGenerator() {} virtual bool initiate() = 0; - virtual void performCallback(uint proc, Addr address) = 0; + virtual void performCallback(uint32_t proc, Addr address) = 0; void setDirectedTester(RubyDirectedTester* directed_tester); diff --git a/src/cpu/testers/directedtest/InvalidateGenerator.cc b/src/cpu/testers/directedtest/InvalidateGenerator.cc index 902c6cc15..4d8271a05 100644 --- a/src/cpu/testers/directedtest/InvalidateGenerator.cc +++ b/src/cpu/testers/directedtest/InvalidateGenerator.cc @@ -103,7 +103,7 @@ InvalidateGenerator::initiate() } void -InvalidateGenerator::performCallback(uint proc, Addr address) +InvalidateGenerator::performCallback(uint32_t proc, Addr address) { assert(m_address == address); diff --git a/src/cpu/testers/directedtest/InvalidateGenerator.hh b/src/cpu/testers/directedtest/InvalidateGenerator.hh index 14c47b70b..50db180e3 100644 --- a/src/cpu/testers/directedtest/InvalidateGenerator.hh +++ b/src/cpu/testers/directedtest/InvalidateGenerator.hh @@ -49,14 +49,14 @@ class InvalidateGenerator : public DirectedGenerator ~InvalidateGenerator(); bool initiate(); - void performCallback(uint proc, Addr address); + void performCallback(uint32_t proc, Addr address); private: InvalidateGeneratorStatus m_status; Addr m_address; - uint m_active_read_node; - uint m_active_inv_node; - uint m_addr_increment_size; + uint32_t m_active_read_node; + uint32_t m_active_inv_node; + uint32_t m_addr_increment_size; }; #endif //__CPU_DIRECTEDTEST_INVALIDATEGENERATOR_HH__ diff --git a/src/cpu/testers/directedtest/RubyDirectedTester.hh b/src/cpu/testers/directedtest/RubyDirectedTester.hh index 163c206d8..53c389692 100644 --- a/src/cpu/testers/directedtest/RubyDirectedTester.hh +++ b/src/cpu/testers/directedtest/RubyDirectedTester.hh @@ -53,11 +53,11 @@ class RubyDirectedTester : public MemObject RubyDirectedTester *tester; public: - CpuPort(const std::string &_name, RubyDirectedTester *_tester, uint _idx) + CpuPort(const std::string &_name, RubyDirectedTester *_tester, uint32_t _idx) : SimpleTimingPort(_name, _tester), tester(_tester), idx(_idx) {} - uint idx; + uint32_t idx; protected: virtual bool recvTiming(PacketPtr pkt); diff --git a/src/cpu/testers/directedtest/SeriesRequestGenerator.cc b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc index 43e140178..4cf9aed1c 100644 --- a/src/cpu/testers/directedtest/SeriesRequestGenerator.cc +++ b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc @@ -89,7 +89,7 @@ SeriesRequestGenerator::initiate() } void -SeriesRequestGenerator::performCallback(uint proc, Addr address) +SeriesRequestGenerator::performCallback(uint32_t proc, Addr address) { assert(m_active_node == proc); assert(m_address == address); diff --git a/src/cpu/testers/directedtest/SeriesRequestGenerator.hh b/src/cpu/testers/directedtest/SeriesRequestGenerator.hh index 97b632a12..9b1c3e8ba 100644 --- a/src/cpu/testers/directedtest/SeriesRequestGenerator.hh +++ b/src/cpu/testers/directedtest/SeriesRequestGenerator.hh @@ -49,13 +49,13 @@ class SeriesRequestGenerator : public DirectedGenerator ~SeriesRequestGenerator(); bool initiate(); - void performCallback(uint proc, Addr address); + void performCallback(uint32_t proc, Addr address); private: SeriesRequestGeneratorStatus m_status; Addr m_address; - uint m_active_node; - uint m_addr_increment_size; + uint32_t m_active_node; + uint32_t m_addr_increment_size; bool m_issue_writes; }; |