diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2012-02-24 11:46:39 -0500 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-02-24 11:46:39 -0500 |
commit | 485d103255c0f64ebf697650c899fe7a80db1d6d (patch) | |
tree | 3826b9e0a3d340a4318bb4900ded5742734824aa /src/cpu/testers/memtest/memtest.cc | |
parent | 9e3c8de30bafe33f35e4b9e82fb49418941f8cb7 (diff) | |
download | gem5-485d103255c0f64ebf697650c899fe7a80db1d6d.tar.xz |
MEM: Move all read/write blob functions from Port to PortProxy
This patch moves the readBlob/writeBlob/memsetBlob from the Port class
to the PortProxy class, thus making a clear separation of the basic
port functionality (recv/send functional/atomic/timing), and the
higher-level functional accessors available on the port proxies.
There are only a few places in the code base where the blob functions
were used on ports, and they are all for peeking into the memory
system without making a normal memory access (in the memtest, and the
malta and tsunami pchip). The memtest also exemplifies how easy it is
to create a non-translating proxy if desired. The malta and tsunami
pchip used a slave port to perform a functional read, and this is now
changed to rely on the physProxy of the system (to which they already
have a pointer).
Diffstat (limited to 'src/cpu/testers/memtest/memtest.cc')
-rw-r--r-- | src/cpu/testers/memtest/memtest.cc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/testers/memtest/memtest.cc b/src/cpu/testers/memtest/memtest.cc index 2d0131a92..dffaa71ed 100644 --- a/src/cpu/testers/memtest/memtest.cc +++ b/src/cpu/testers/memtest/memtest.cc @@ -125,6 +125,7 @@ MemTest::MemTest(const Params *p) tickEvent(this), cachePort("test", this), funcPort("functional", this), + funcProxy(funcPort), retryPkt(NULL), // mainMem(main_mem), // checkMem(check_mem), @@ -237,7 +238,7 @@ MemTest::completeRequest(PacketPtr pkt) exitSimLoop("maximum number of loads reached"); } else { assert(pkt->isWrite()); - funcPort.writeBlob(req->getPaddr(), pkt_data, req->getSize()); + funcProxy.writeBlob(req->getPaddr(), pkt_data, req->getSize()); numWrites++; numWritesStat++; } @@ -349,7 +350,7 @@ MemTest::tick() outstandingAddrs.insert(paddr); // ***** NOTE FOR RON: I'm not sure how to access checkMem. - Kevin - funcPort.readBlob(req->getPaddr(), result, req->getSize()); + funcProxy.readBlob(req->getPaddr(), result, req->getSize()); DPRINTF(MemTest, "id %d initiating %sread at addr %x (blk %x) expecting %x\n", |