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| author | Gabe Black <gabeblack@google.com> | 2019-04-22 19:45:10 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-04-28 01:19:40 +0000 |
| commit | cdcc55a6a8fe9b4625b316a8d8845366ccfa71c9 (patch) | |
| tree | 893cea35432466600b55a2e4434ed61ba1e28f69 /src/cpu/testers/memtest | |
| parent | 3cfff8574a19536e2b3d057b43b59fcf35932c81 (diff) | |
| download | gem5-cdcc55a6a8fe9b4625b316a8d8845366ccfa71c9.tar.xz | |
mem: Minimize the use of MemObject.
MemObject doesn't provide anything beyond its base ClockedObject any
more, so this change removes it from most inheritance hierarchies.
Occasionally MemObject is replaced with SimObject when I was fairly
confident that the extra functionality of ClockedObject wasn't needed.
Change-Id: Ic014ab61e56402e62548e8c831eb16e26523fdce
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18289
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/cpu/testers/memtest')
| -rw-r--r-- | src/cpu/testers/memtest/MemTest.py | 4 | ||||
| -rw-r--r-- | src/cpu/testers/memtest/memtest.cc | 7 | ||||
| -rw-r--r-- | src/cpu/testers/memtest/memtest.hh | 5 |
3 files changed, 8 insertions, 8 deletions
diff --git a/src/cpu/testers/memtest/MemTest.py b/src/cpu/testers/memtest/MemTest.py index 5585b1f70..b4eb0b528 100644 --- a/src/cpu/testers/memtest/MemTest.py +++ b/src/cpu/testers/memtest/MemTest.py @@ -41,9 +41,9 @@ from m5.params import * from m5.proxy import * -from m5.objects.MemObject import MemObject +from m5.objects.ClockedObject import ClockedObject -class MemTest(MemObject): +class MemTest(ClockedObject): type = 'MemTest' cxx_header = "cpu/testers/memtest/memtest.hh" diff --git a/src/cpu/testers/memtest/memtest.cc b/src/cpu/testers/memtest/memtest.cc index 346f88246..93a6ac6b9 100644 --- a/src/cpu/testers/memtest/memtest.cc +++ b/src/cpu/testers/memtest/memtest.cc @@ -48,7 +48,6 @@ #include "base/statistics.hh" #include "base/trace.hh" #include "debug/MemTest.hh" -#include "mem/mem_object.hh" #include "sim/sim_exit.hh" #include "sim/stats.hh" #include "sim/system.hh" @@ -85,7 +84,7 @@ MemTest::sendPkt(PacketPtr pkt) { } MemTest::MemTest(const Params *p) - : MemObject(p), + : ClockedObject(p), tickEvent([this]{ tick(); }, name()), noRequestEvent([this]{ noRequest(); }, name()), noResponseEvent([this]{ noResponse(); }, name()), @@ -130,7 +129,7 @@ MemTest::getPort(const std::string &if_name, PortID idx) if (if_name == "port") return port; else - return MemObject::getPort(if_name, idx); + return ClockedObject::getPort(if_name, idx); } void @@ -197,7 +196,7 @@ MemTest::completeRequest(PacketPtr pkt, bool functional) void MemTest::regStats() { - MemObject::regStats(); + ClockedObject::regStats(); using namespace Stats; diff --git a/src/cpu/testers/memtest/memtest.hh b/src/cpu/testers/memtest/memtest.hh index b429fed69..f536f0369 100644 --- a/src/cpu/testers/memtest/memtest.hh +++ b/src/cpu/testers/memtest/memtest.hh @@ -49,8 +49,9 @@ #include <unordered_map> #include "base/statistics.hh" -#include "mem/mem_object.hh" +#include "mem/port.hh" #include "params/MemTest.hh" +#include "sim/clocked_object.hh" #include "sim/eventq.hh" #include "sim/stats.hh" @@ -67,7 +68,7 @@ * both requests and responses, thus checking that the memory-system * is making progress. */ -class MemTest : public MemObject +class MemTest : public ClockedObject { public: |