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| author | Brad Beckmann <Brad.Beckmann@amd.com> | 2012-04-06 13:47:06 -0700 |
|---|---|---|
| committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2012-04-06 13:47:06 -0700 |
| commit | 0a9f4b950fb52db3951ad1f7aafc674b505d2679 (patch) | |
| tree | 033bfd48877875c00201058f1a60e679696c9cdf /src/cpu/testers/rubytest/RubyTester.py | |
| parent | b00949d88bb3185dfa2e27799de7f90e5a449be8 (diff) | |
| download | gem5-0a9f4b950fb52db3951ad1f7aafc674b505d2679.tar.xz | |
rubytest: seperated read and write ports.
This patch allows the ruby tester to support protocols where the i-cache and d-cache
are managed by seperate controllers.
Diffstat (limited to 'src/cpu/testers/rubytest/RubyTester.py')
| -rw-r--r-- | src/cpu/testers/rubytest/RubyTester.py | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/cpu/testers/rubytest/RubyTester.py b/src/cpu/testers/rubytest/RubyTester.py index 6518862e9..2eaeb8efd 100644 --- a/src/cpu/testers/rubytest/RubyTester.py +++ b/src/cpu/testers/rubytest/RubyTester.py @@ -32,7 +32,9 @@ from m5.proxy import * class RubyTester(MemObject): type = 'RubyTester' - cpuPort = VectorMasterPort("the cpu ports") + num_cpus = Param.Int("number of cpus / RubyPorts") + cpuDataPort = VectorMasterPort("the cpu data cache ports") + cpuInstPort = VectorMasterPort("the cpu inst cache ports") checks_to_complete = Param.Int(100, "checks to complete") deadlock_threshold = Param.Int(50000, "how often to check for deadlock") wakeup_frequency = Param.Int(10, "number of cycles between wakeups") |