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| author | Andreas Hansson <andreas.hansson@arm.com> | 2012-04-25 10:41:23 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-04-25 10:41:23 -0400 |
| commit | 4c92708b48d51bfb6592ff48925f5a7a0157da5b (patch) | |
| tree | 2535fb1529ef60f64a3f26f943af5d8d681b22d8 /src/cpu/testers/rubytest | |
| parent | 79750fc575db0966ff9d0530975377c35f630eca (diff) | |
| download | gem5-4c92708b48d51bfb6592ff48925f5a7a0157da5b.tar.xz | |
MEM: Add the PortId type and a corresponding id field to Port
This patch introduces the PortId type, moves the definition of
INVALID_PORT_ID to the Port class, and also gives every port an id to
reflect the fact that each element in a vector port has an
identifier/index.
Previously the bus and Ruby testers (and potentially other users of
the vector ports) added the id field in their port subclasses, and now
this functionality is always present as it is moved to the base class.
Diffstat (limited to 'src/cpu/testers/rubytest')
| -rw-r--r-- | src/cpu/testers/rubytest/RubyTester.cc | 2 | ||||
| -rw-r--r-- | src/cpu/testers/rubytest/RubyTester.hh | 6 |
2 files changed, 3 insertions, 5 deletions
diff --git a/src/cpu/testers/rubytest/RubyTester.cc b/src/cpu/testers/rubytest/RubyTester.cc index 1e9827515..2862a261d 100644 --- a/src/cpu/testers/rubytest/RubyTester.cc +++ b/src/cpu/testers/rubytest/RubyTester.cc @@ -156,7 +156,7 @@ RubyTester::CpuPort::recvTiming(PacketPtr pkt) // pop the sender state from the packet pkt->senderState = senderState->saved; - tester->hitCallback(idx, subblock); + tester->hitCallback(id, subblock); // Now that the tester has completed, delete the senderState // (includes sublock) and the packet, then return diff --git a/src/cpu/testers/rubytest/RubyTester.hh b/src/cpu/testers/rubytest/RubyTester.hh index 266209b8f..5d2202f65 100644 --- a/src/cpu/testers/rubytest/RubyTester.hh +++ b/src/cpu/testers/rubytest/RubyTester.hh @@ -57,12 +57,10 @@ class RubyTester : public MemObject // RubyPorts that support both types of requests, separate InstOnly // and DataOnly CpuPorts will map to that RubyPort - CpuPort(const std::string &_name, RubyTester *_tester, int _idx) - : MasterPort(_name, _tester), tester(_tester), idx(_idx) + CpuPort(const std::string &_name, RubyTester *_tester, PortId _id) + : MasterPort(_name, _tester, _id), tester(_tester) {} - int idx; - protected: virtual bool recvTiming(PacketPtr pkt); virtual void recvRetry() |