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| author | Andreas Hansson <andreas.hansson@arm.com> | 2012-10-15 08:12:35 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-10-15 08:12:35 -0400 |
| commit | 2a740aa09682c32eb8f1f8880f279c943d8c6ee1 (patch) | |
| tree | 61ca1dcb9336bc1f4dbc791c876875c1c260ca8d /src/cpu/testers/rubytest | |
| parent | 9baa35ba802f2cfb9fb9ecdebf111f4cd793a428 (diff) | |
| download | gem5-2a740aa09682c32eb8f1f8880f279c943d8c6ee1.tar.xz | |
Port: Add protocol-agnostic ports in the port hierarchy
This patch adds an additional level of ports in the inheritance
hierarchy, separating out the protocol-specific and protocl-agnostic
parts. All the functionality related to the binding of ports is now
confined to use BaseMaster/BaseSlavePorts, and all the
protocol-specific parts stay in the Master/SlavePort. In the future it
will be possible to add other protocol-specific implementations.
The functions used in the binding of ports, i.e. getMaster/SlavePort
now use the base classes, and the index parameter is updated to use
the PortID typedef with the symbolic InvalidPortID as the default.
Diffstat (limited to 'src/cpu/testers/rubytest')
| -rw-r--r-- | src/cpu/testers/rubytest/RubyTester.cc | 6 | ||||
| -rw-r--r-- | src/cpu/testers/rubytest/RubyTester.hh | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/testers/rubytest/RubyTester.cc b/src/cpu/testers/rubytest/RubyTester.cc index bdd6dacce..6ddab93e8 100644 --- a/src/cpu/testers/rubytest/RubyTester.cc +++ b/src/cpu/testers/rubytest/RubyTester.cc @@ -111,8 +111,8 @@ RubyTester::init() m_checkTable_ptr = new CheckTable(m_num_writers, m_num_readers, this); } -MasterPort & -RubyTester::getMasterPort(const std::string &if_name, int idx) +BaseMasterPort & +RubyTester::getMasterPort(const std::string &if_name, PortID idx) { if (if_name != "cpuInstPort" && if_name != "cpuDataPort") { // pass it along to our super class @@ -134,7 +134,7 @@ RubyTester::getMasterPort(const std::string &if_name, int idx) // index // int read_idx = idx + m_num_inst_ports; - if (read_idx >= static_cast<int>(readPorts.size())) { + if (read_idx >= static_cast<PortID>(readPorts.size())) { panic("RubyTester::getMasterPort: unknown data port idx %d\n", idx); } diff --git a/src/cpu/testers/rubytest/RubyTester.hh b/src/cpu/testers/rubytest/RubyTester.hh index ad4b506ac..2fed84e2d 100644 --- a/src/cpu/testers/rubytest/RubyTester.hh +++ b/src/cpu/testers/rubytest/RubyTester.hh @@ -89,8 +89,8 @@ class RubyTester : public MemObject RubyTester(const Params *p); ~RubyTester(); - virtual MasterPort &getMasterPort(const std::string &if_name, - int idx = -1); + virtual BaseMasterPort &getMasterPort(const std::string &if_name, + PortID idx = InvalidPortID); bool isInstReadableCpuPort(int idx); |