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authorAndreas Sandberg <Andreas.Sandberg@ARM.com>2013-01-07 13:05:44 -0500
committerAndreas Sandberg <Andreas.Sandberg@ARM.com>2013-01-07 13:05:44 -0500
commit4ae02295d59036fa2f9d272ee288e0321bb8257a (patch)
treebe3223b70e1e94585e7c2d50ca29c2a32ae4645b /src/cpu/thread_context.cc
parent6daada2701c7ea361843a7c2a50cb616b56b1519 (diff)
downloadgem5-4ae02295d59036fa2f9d272ee288e0321bb8257a.tar.xz
cpu: Unify SimpleCPU and O3 CPU serialization code
The O3 CPU used to copy its thread context to a SimpleThread in order to do serialization. This was a bit of a hack involving two static SimpleThread instances and a magic constructor that was only used by the O3 CPU. This patch moves the ThreadContext serialization code into two global procedures that, in addition to the normal serialization parameters, take a ThreadContext reference as a parameter. This allows us to reuse the serialization code in all ThreadContext implementations.
Diffstat (limited to 'src/cpu/thread_context.cc')
-rw-r--r--src/cpu/thread_context.cc58
1 files changed, 58 insertions, 0 deletions
diff --git a/src/cpu/thread_context.cc b/src/cpu/thread_context.cc
index c403667bf..4a4038297 100644
--- a/src/cpu/thread_context.cc
+++ b/src/cpu/thread_context.cc
@@ -1,4 +1,16 @@
/*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2006 The Regents of The University of Michigan
* All rights reserved.
*
@@ -78,3 +90,49 @@ ThreadContext::compare(ThreadContext *one, ThreadContext *two)
}
+
+void
+serialize(ThreadContext &tc, std::ostream &os)
+{
+ using namespace TheISA;
+
+ FloatRegBits floatRegs[NumFloatRegs];
+ for (int i = 0; i < NumFloatRegs; ++i)
+ floatRegs[i] = tc.readFloatRegBitsFlat(i);
+ // This is a bit ugly, but needed to maintain backwards
+ // compatibility.
+ arrayParamOut(os, "floatRegs.i", floatRegs, NumFloatRegs);
+
+ IntReg intRegs[NumIntRegs];
+ for (int i = 0; i < NumIntRegs; ++i)
+ intRegs[i] = tc.readIntRegFlat(i);
+ SERIALIZE_ARRAY(intRegs, NumIntRegs);
+
+ tc.pcState().serialize(os);
+
+ // thread_num and cpu_id are deterministic from the config
+}
+
+void
+unserialize(ThreadContext &tc, Checkpoint *cp, const std::string &section)
+{
+ using namespace TheISA;
+
+ FloatRegBits floatRegs[NumFloatRegs];
+ // This is a bit ugly, but needed to maintain backwards
+ // compatibility.
+ arrayParamIn(cp, section, "floatRegs.i", floatRegs, NumFloatRegs);
+ for (int i = 0; i < NumFloatRegs; ++i)
+ tc.setFloatRegBitsFlat(i, floatRegs[i]);
+
+ IntReg intRegs[NumIntRegs];
+ UNSERIALIZE_ARRAY(intRegs, NumIntRegs);
+ for (int i = 0; i < NumIntRegs; ++i)
+ tc.setIntRegFlat(i, intRegs[i]);
+
+ PCState pcState;
+ pcState.unserialize(cp, section);
+ tc.pcState(pcState);
+
+ // thread_num and cpu_id are deterministic from the config
+}