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author | Min Kyu Jeong <minkyu.jeong@arm.com> | 2010-08-23 11:18:40 -0500 |
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committer | Min Kyu Jeong <minkyu.jeong@arm.com> | 2010-08-23 11:18:40 -0500 |
commit | 5f91ec3f4618dad8d36efbf8b5a5112a1ce0d1b7 (patch) | |
tree | 3984b0d3f3328901bf8c999b9d01162943fb328d /src/cpu/thread_context.hh | |
parent | 7acf67971cca761efec79a0a0ac453b1115387a9 (diff) | |
download | gem5-5f91ec3f4618dad8d36efbf8b5a5112a1ce0d1b7.tar.xz |
ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.
THis allows the CPU to handle predicated-false instructions accordingly.
This particular patch makes loads that are predicated-false to be sent
straight to the commit stage directly, not waiting for return of the data
that was never requested since it was predicated-false.
Diffstat (limited to 'src/cpu/thread_context.hh')
-rw-r--r-- | src/cpu/thread_context.hh | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh index 78ecdacf2..7f6d258ab 100644 --- a/src/cpu/thread_context.hh +++ b/src/cpu/thread_context.hh @@ -404,6 +404,11 @@ class ProxyThreadContext : public ThreadContext void setNextMicroPC(uint64_t val) { actualTC->setNextMicroPC(val); } + bool readPredicate() { return actualTC->readPredicate(); } + + void setPredicate(bool val) + { actualTC->setPredicate(val); } + MiscReg readMiscRegNoEffect(int misc_reg) { return actualTC->readMiscRegNoEffect(misc_reg); } |