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authorKevin Lim <ktlim@umich.edu>2006-10-31 14:33:56 -0500
committerKevin Lim <ktlim@umich.edu>2006-10-31 14:33:56 -0500
commitbfd5eb2b08dad700d085a637d5e16a61dcc530d7 (patch)
treed8a5404b828f37287a020ca028a4ea8fc13a106b /src/cpu/thread_state.cc
parentb26355daa87c7a86a96a90b2002bc5684741288c (diff)
downloadgem5-bfd5eb2b08dad700d085a637d5e16a61dcc530d7.tar.xz
Remove mem parameter. Now the translating port asks the CPU's dcache's peer for its MemObject instead of having to have a paramter for the MemObject.
configs/example/fs.py: configs/example/se.py: src/cpu/simple/base.cc: src/cpu/simple/base.hh: src/cpu/simple/timing.cc: src/cpu/simple_thread.cc: src/cpu/simple_thread.hh: src/cpu/thread_state.cc: src/cpu/thread_state.hh: tests/configs/o3-timing-mp.py: tests/configs/o3-timing.py: tests/configs/simple-atomic-mp.py: tests/configs/simple-atomic.py: tests/configs/simple-timing-mp.py: tests/configs/simple-timing.py: tests/configs/tsunami-simple-atomic-dual.py: tests/configs/tsunami-simple-atomic.py: tests/configs/tsunami-simple-timing-dual.py: tests/configs/tsunami-simple-timing.py: No need for mem parameter any more. src/cpu/checker/cpu.cc: Use new constructor for simple thread (no more MemObject parameter). src/cpu/checker/cpu.hh: Remove MemObject parameter. src/cpu/memtest/memtest.hh: Ports now take in their MemObject owner. src/cpu/o3/alpha/cpu_builder.cc: Remove mem parameter. src/cpu/o3/alpha/cpu_impl.hh: Remove memory parameter and clean up handling of TranslatingPort. src/cpu/o3/cpu.cc: src/cpu/o3/cpu.hh: src/cpu/o3/fetch.hh: src/cpu/o3/fetch_impl.hh: src/cpu/o3/mips/cpu_builder.cc: src/cpu/o3/mips/cpu_impl.hh: src/cpu/o3/params.hh: src/cpu/o3/thread_state.hh: src/cpu/ozone/cpu.hh: src/cpu/ozone/cpu_builder.cc: src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/front_end.hh: src/cpu/ozone/front_end_impl.hh: src/cpu/ozone/lw_lsq.hh: src/cpu/ozone/lw_lsq_impl.hh: src/cpu/ozone/simple_params.hh: src/cpu/ozone/thread_state.hh: src/cpu/simple/atomic.cc: Remove memory parameter. --HG-- extra : convert_revision : 43cb44a33b31320d44b69679dcf646c0380d07d3
Diffstat (limited to 'src/cpu/thread_state.cc')
-rw-r--r--src/cpu/thread_state.cc43
1 files changed, 37 insertions, 6 deletions
diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc
index c644ae8d7..677ba6592 100644
--- a/src/cpu/thread_state.cc
+++ b/src/cpu/thread_state.cc
@@ -29,8 +29,11 @@
*/
#include "base/output.hh"
+#include "cpu/base.hh"
#include "cpu/profile.hh"
#include "cpu/thread_state.hh"
+#include "mem/port.hh"
+#include "mem/translating_port.hh"
#include "sim/serialize.hh"
#if FULL_SYSTEM
@@ -39,15 +42,16 @@
#endif
#if FULL_SYSTEM
-ThreadState::ThreadState(int _cpuId, int _tid)
- : cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0),
+ThreadState::ThreadState(BaseCPU *cpu, int _cpuId, int _tid)
+ : baseCpu(cpu), cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0),
profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
+ physPort(NULL), virtPort(NULL),
microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0)
#else
-ThreadState::ThreadState(int _cpuId, int _tid, Process *_process,
- short _asid, MemObject *mem)
- : cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0),
- process(_process), asid(_asid),
+ThreadState::ThreadState(BaseCPU *cpu, int _cpuId, int _tid, Process *_process,
+ short _asid)
+ : baseCpu(cpu), cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0),
+ port(NULL), process(_process), asid(_asid),
microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0)
#endif
{
@@ -108,4 +112,31 @@ ThreadState::profileSample()
profile->sample(profileNode, profilePC);
}
+#else
+TranslatingPort *
+ThreadState::getMemPort()
+{
+ if (port != NULL)
+ return port;
+
+ /* Use this port to for syscall emulation writes to memory. */
+ Port *dcache_port, *func_mem_port;
+ port = new TranslatingPort(csprintf("%s-%d-funcport",
+ baseCpu->name(), tid),
+ process->pTable, false);
+
+ dcache_port = baseCpu->getPort("dcache_port");
+ assert(dcache_port != NULL);
+
+ MemObject *mem_object = dcache_port->getPeer()->getOwner();
+ assert(mem_object != NULL);
+
+ func_mem_port = mem_object->getPort("functional");
+ assert(func_mem_port != NULL);
+
+ func_mem_port->setPeer(port);
+ port->setPeer(func_mem_port);
+
+ return port;
+}
#endif