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authorAndreas Hansson <andreas.hansson@arm.com>2013-05-30 12:54:09 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-05-30 12:54:09 -0400
commit4d7d8393edff8ce8965d414b22796f6b286c7050 (patch)
treedec3a07d9e06816697d0dc9ca5debf2b1986088d /src/cpu/trace/SConscript
parent6f4be9bd4ca74fa3d20e103fc8316492963c3167 (diff)
downloadgem5-4d7d8393edff8ce8965d414b22796f6b286c7050.tar.xz
cpu: Prune the stale TraceCPU
This patch prunes the TraceCPU as the code is stale and the functionality that it provided can now be achieved with the TrafficGen using its trace playback mode. The TraceCPU was able to play back pre-recorded memory traces of a few different formats, and to achieve this level of flexibility with the TrafficGen, use the util/encode_packet_trace (with suitable modifications) to create a protobuf trace off-line.
Diffstat (limited to 'src/cpu/trace/SConscript')
-rw-r--r--src/cpu/trace/SConscript40
1 files changed, 0 insertions, 40 deletions
diff --git a/src/cpu/trace/SConscript b/src/cpu/trace/SConscript
deleted file mode 100644
index f166b2f23..000000000
--- a/src/cpu/trace/SConscript
+++ /dev/null
@@ -1,40 +0,0 @@
-# -*- mode:python -*-
-
-# Copyright (c) 2006 The Regents of The University of Michigan
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Nathan Binkert
-
-Import('*')
-
-if False:
- Source('opt_cpu.cc')
- Source('trace_cpu.cc')
-
- Source('reader/mem_trace_reader.cc')
- Source('reader/ibm_reader.cc')
- Source('reader/itx_reader.cc')
- Source('reader/m5_reader.cc')