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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2017-11-08 11:24:58 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-02-05 09:44:22 +0000 |
| commit | 0c208d94cac1f89a04a5adb242327fa9fd13d70e (patch) | |
| tree | bd6ac77f925cd6348440aa5bdc3c235c91df2de6 /src/cpu/trace/trace_cpu.cc | |
| parent | eea11aedcfe18b29d6e63243bc1acb51441ef523 (diff) | |
| download | gem5-0c208d94cac1f89a04a5adb242327fa9fd13d70e.tar.xz | |
cpu: MinorCPU handling IsSquashAfter flag
MinorCPU was not handling IsSquashAfter flagged instructions. The
behaviour was to force a branch (hence enforcing refetching) for
SerializeAfter instructions only. This has now been extended to
SquashAfter in order to correctly support ISB barrier instruction
behaviour.
Change-Id: Ie525b23350b0de121372d3b98b433e36b097d5c4
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5702
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/cpu/trace/trace_cpu.cc')
0 files changed, 0 insertions, 0 deletions