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authorGiacomo Travaglini <giacomo.travaglini@arm.com>2018-04-04 16:27:04 +0100
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2018-04-27 16:00:28 +0000
commit5187a24d496cd16bfe440f52ff0c45ab0e185306 (patch)
treec491ebdad23a5f9e57ef62ffeabcf2b87289f5ce /src/cpu/trace/trace_cpu.cc
parent685cf2d1f8ae2f2ca3168a650efa1d36120783fe (diff)
downloadgem5-5187a24d496cd16bfe440f52ff0c45ab0e185306.tar.xz
sim,cpu,mem,arch: Introduced MasterInfo data structure
With this patch a gem5 System will store more info about its Masters. While it was previously keeping track of the Master name and Master ID only, it is now adding a per-Master pointer to the SimObject related to the Master. This will make it possible for a client to query a System for a Master using either the master's name or the master's pointer. Change-Id: I8b97d328a65cd06f329e2cdd3679451c17d2b8f6 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/9781 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/cpu/trace/trace_cpu.cc')
-rw-r--r--src/cpu/trace/trace_cpu.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc
index 824c1258f..77755e888 100644
--- a/src/cpu/trace/trace_cpu.cc
+++ b/src/cpu/trace/trace_cpu.cc
@@ -50,8 +50,8 @@ TraceCPU::TraceCPU(TraceCPUParams *params)
: BaseCPU(params),
icachePort(this),
dcachePort(this),
- instMasterID(params->system->getMasterId(name() + ".inst")),
- dataMasterID(params->system->getMasterId(name() + ".data")),
+ instMasterID(params->system->getMasterId(this, "inst")),
+ dataMasterID(params->system->getMasterId(this, "data")),
instTraceFile(params->instTraceFile),
dataTraceFile(params->dataTraceFile),
icacheGen(*this, ".iside", icachePort, instMasterID, instTraceFile),