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authorNathan Binkert <nate@binkert.org>2007-07-26 23:15:49 -0700
committerNathan Binkert <nate@binkert.org>2007-07-26 23:15:49 -0700
commitf0fef8f850b0c5aa73337ca11b26169163b2b2e1 (patch)
treed49d3492618ee85717554cddbe62cba1b5e7fb9c /src/cpu/trace
parent6b73ff43ff58502c80050c7aeff5a08a4ce61f87 (diff)
parentcda354b07035f73a3b220f89014721300d36a815 (diff)
downloadgem5-f0fef8f850b0c5aa73337ca11b26169163b2b2e1.tar.xz
Merge python and x86 changes with cache branch
--HG-- extra : convert_revision : e06a950964286604274fba81dcca362d75847233
Diffstat (limited to 'src/cpu/trace')
-rw-r--r--src/cpu/trace/opt_cpu.cc32
-rw-r--r--src/cpu/trace/reader/ibm_reader.cc25
-rw-r--r--src/cpu/trace/reader/itx_reader.cc25
-rw-r--r--src/cpu/trace/reader/m5_reader.cc23
-rw-r--r--src/cpu/trace/reader/mem_trace_reader.cc39
-rw-r--r--src/cpu/trace/trace_cpu.cc28
6 files changed, 22 insertions, 150 deletions
diff --git a/src/cpu/trace/opt_cpu.cc b/src/cpu/trace/opt_cpu.cc
index 0f2944f07..33da3d870 100644
--- a/src/cpu/trace/opt_cpu.cc
+++ b/src/cpu/trace/opt_cpu.cc
@@ -38,8 +38,7 @@
#include "cpu/trace/opt_cpu.hh"
#include "cpu/trace/reader/mem_trace_reader.hh"
-
-#include "sim/builder.hh"
+#include "params/OptCPU.hh"
#include "sim/sim_events.hh"
using namespace std;
@@ -211,31 +210,8 @@ OptCPU::TickEvent::description()
}
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(OptCPU)
-
- SimObjectParam<MemTraceReader *> data_trace;
- Param<int> size;
- Param<int> block_size;
-Param<int> assoc;
-
-END_DECLARE_SIM_OBJECT_PARAMS(OptCPU)
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(OptCPU)
-
- INIT_PARAM_DFLT(data_trace, "memory trace", NULL),
- INIT_PARAM(size, "cache size"),
- INIT_PARAM(block_size, "block size"),
- INIT_PARAM(assoc,"associativity")
-
-END_INIT_SIM_OBJECT_PARAMS(OptCPU)
-
-CREATE_SIM_OBJECT(OptCPU)
+OptCPU *
+OptCPUParams::create()
{
- return new OptCPU(getInstanceName(),
- data_trace,
- block_size,
- size,
- assoc);
+ return new OptCPU(name, data_trace, block_size, size, assoc);
}
-
-REGISTER_SIM_OBJECT("OptCPU", OptCPU)
diff --git a/src/cpu/trace/reader/ibm_reader.cc b/src/cpu/trace/reader/ibm_reader.cc
index 87e13f307..e300385d6 100644
--- a/src/cpu/trace/reader/ibm_reader.cc
+++ b/src/cpu/trace/reader/ibm_reader.cc
@@ -34,9 +34,9 @@
*/
#include <sstream>
-#include "cpu/trace/reader/ibm_reader.hh"
-#include "sim/builder.hh"
#include "base/misc.hh" // for fatal
+#include "cpu/trace/reader/ibm_reader.hh"
+#include "params/IBMReader.hh"
using namespace std;
@@ -100,23 +100,8 @@ IBMReader::getNextReq(MemReqPtr &req)
return 0;
}
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(IBMReader)
-
- Param<string> filename;
-
-END_DECLARE_SIM_OBJECT_PARAMS(IBMReader)
-
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(IBMReader)
-
- INIT_PARAM(filename, "trace file")
-
-END_INIT_SIM_OBJECT_PARAMS(IBMReader)
-
-
-CREATE_SIM_OBJECT(IBMReader)
+IBMReader *
+IBMReaderParams::create()
{
- return new IBMReader(getInstanceName(), filename);
+ return new IBMReader(name, filename);
}
-
-REGISTER_SIM_OBJECT("IBMReader", IBMReader)
diff --git a/src/cpu/trace/reader/itx_reader.cc b/src/cpu/trace/reader/itx_reader.cc
index e4738eed8..f27b82ff1 100644
--- a/src/cpu/trace/reader/itx_reader.cc
+++ b/src/cpu/trace/reader/itx_reader.cc
@@ -34,9 +34,9 @@
*/
#include <sstream>
-#include "cpu/trace/reader/itx_reader.hh"
-#include "sim/builder.hh"
#include "base/misc.hh" // for fatal
+#include "cpu/trace/reader/itx_reader.hh"
+#include "params/ITXReader.hh"
using namespace std;
@@ -186,23 +186,8 @@ ITXReader::getNextReq(MemReqPtr &req)
return 0;
}
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(ITXReader)
-
- Param<string> filename;
-
-END_DECLARE_SIM_OBJECT_PARAMS(ITXReader)
-
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(ITXReader)
-
- INIT_PARAM(filename, "trace file")
-
-END_INIT_SIM_OBJECT_PARAMS(ITXReader)
-
-
-CREATE_SIM_OBJECT(ITXReader)
+ITXReader *
+ITXReaderParams::create()
{
- return new ITXReader(getInstanceName(), filename);
+ return new ITXReader(name, filename);
}
-
-REGISTER_SIM_OBJECT("ITXReader", ITXReader)
diff --git a/src/cpu/trace/reader/m5_reader.cc b/src/cpu/trace/reader/m5_reader.cc
index 8efcb022b..4e714a058 100644
--- a/src/cpu/trace/reader/m5_reader.cc
+++ b/src/cpu/trace/reader/m5_reader.cc
@@ -36,7 +36,7 @@
#include "cpu/trace/reader/m5_reader.hh"
#include "mem/trace/m5_format.hh"
#include "mem/mem_cmd.hh"
-#include "sim/builder.hh"
+#include "params/M5Reader.hh"
using namespace std;
@@ -77,23 +77,8 @@ M5Reader::getNextReq(MemReqPtr &req)
return ref.cycle;
}
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(M5Reader)
-
- Param<string> filename;
-
-END_DECLARE_SIM_OBJECT_PARAMS(M5Reader)
-
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(M5Reader)
-
- INIT_PARAM(filename, "trace file")
-
-END_INIT_SIM_OBJECT_PARAMS(M5Reader)
-
-
-CREATE_SIM_OBJECT(M5Reader)
+M5Reader *
+M5ReaderParams::create()
{
- return new M5Reader(getInstanceName(), filename);
+ return new M5Reader(name, filename);
}
-
-REGISTER_SIM_OBJECT("M5Reader", M5Reader)
diff --git a/src/cpu/trace/reader/mem_trace_reader.cc b/src/cpu/trace/reader/mem_trace_reader.cc
deleted file mode 100644
index 5623f168a..000000000
--- a/src/cpu/trace/reader/mem_trace_reader.cc
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2004-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Erik Hallnor
- */
-
-/**
- * @file
- * SimObject Declaration of pure virtual MemTraceReader class.
- */
-
-#include "cpu/trace/reader/mem_trace_reader.hh"
-#include "sim/param.hh"
-
-DEFINE_SIM_OBJECT_CLASS_NAME("MemTraceReader", MemTraceReader);
diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc
index 32ed6c7d7..e5739b2ce 100644
--- a/src/cpu/trace/trace_cpu.cc
+++ b/src/cpu/trace/trace_cpu.cc
@@ -40,7 +40,7 @@
#include "cpu/trace/reader/mem_trace_reader.hh"
#include "mem/base_mem.hh" // For PARAM constructor
#include "mem/mem_interface.hh"
-#include "sim/builder.hh"
+#include "params/TraceCPU.hh"
#include "sim/sim_events.hh"
using namespace std;
@@ -151,31 +151,11 @@ TraceCPU::TickEvent::description()
return "TraceCPU tick";
}
-
-
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(TraceCPU)
-
- SimObjectParam<BaseMem *> icache;
- SimObjectParam<BaseMem *> dcache;
- SimObjectParam<MemTraceReader *> data_trace;
-
-END_DECLARE_SIM_OBJECT_PARAMS(TraceCPU)
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(TraceCPU)
-
- INIT_PARAM_DFLT(icache, "instruction cache", NULL),
- INIT_PARAM_DFLT(dcache, "data cache", NULL),
- INIT_PARAM_DFLT(data_trace, "data trace", NULL)
-
-END_INIT_SIM_OBJECT_PARAMS(TraceCPU)
-
-CREATE_SIM_OBJECT(TraceCPU)
+TraceCPU *
+TraceCPUParams::create()
{
- return new TraceCPU(getInstanceName(),
+ return new TraceCPU(name,
(icache) ? icache->getInterface() : NULL,
(dcache) ? dcache->getInterface() : NULL,
data_trace);
}
-
-REGISTER_SIM_OBJECT("TraceCPU", TraceCPU)
-