Revert power patch sets with unexpected interactions

The following patches had unexpected interactions with the current
upstream code and have been reverted for now:

e07fd01651f3: power: Add support for power models
831c7f2f9e39: power: Low-power idle power state for idle CPUs
4f749e00b667: power: Add power states to ClockedObject

Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>

--HG--
extra : amend_source : 0b6fb073c6bbc24be533ec431eb51fbf1b269508

1 files changed, 2 insertions, 2 deletions

diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc
index e81a79818..d6aa9aaeb 100644
--- a/src/cpu/trace/trace_cpu.cc
+++ b/src/cpu/trace/trace_cpu.cc
@@ -627,7 +627,7 @@ TraceCPU::ElasticDataGen::executeMemReq(GraphNode* node_ptr)
     // Create a request and the packet containing request
     Request* req = new Request(node_ptr->physAddr, node_ptr->size,
                                node_ptr->flags, masterID, node_ptr->seqNum,
-                               ContextID(0));
+                               ContextID(0), ThreadID(0));
     req->setPC(node_ptr->pc);
     // If virtual address is valid, set the asid and virtual address fields
     // of the request.
@@ -1123,7 +1123,7 @@ TraceCPU::FixedRetryGen::send(Addr addr, unsigned size, const MemCmd& cmd,
     req->setPC(pc);
 
     // If this is not done it triggers assert in L1 cache for invalid contextId
-    req->setContext(ContextID(0));
+    req->setThreadContext(ContextID(0), ThreadID(0));
 
     // Embed it in a packet
     PacketPtr pkt = new Packet(req, cmd);