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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-09-25 20:00:46 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-09-25 20:00:46 -0700 |
| commit | 032a30f345cb572c680f65473a69d30ab05b02e3 (patch) | |
| tree | 770806aab25e5c277cac58e27ef8f61633dca4b1 /src/cpu | |
| parent | dd277e0d8f1e0303a74a29bd729864a4766e6f73 (diff) | |
| download | gem5-032a30f345cb572c680f65473a69d30ab05b02e3.tar.xz | |
SPARC: Fix a stupid mistake which was breaking the SPARC regressions.
--HG--
extra : convert_revision : 34a11df0d467ea249211dd3aba86bc8d2aea45de
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/simple_thread.hh | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index c018e3e49..2b79c9708 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -241,25 +241,25 @@ class SimpleThread : public ThreadState FloatReg readFloatReg(int reg_idx, int width) { - int flatIndex = TheISA::flattenIntIndex(getTC(), reg_idx); + int flatIndex = TheISA::flattenFloatIndex(getTC(), reg_idx); return regs.readFloatReg(flatIndex, width); } FloatReg readFloatReg(int reg_idx) { - int flatIndex = TheISA::flattenIntIndex(getTC(), reg_idx); + int flatIndex = TheISA::flattenFloatIndex(getTC(), reg_idx); return regs.readFloatReg(flatIndex); } FloatRegBits readFloatRegBits(int reg_idx, int width) { - int flatIndex = TheISA::flattenIntIndex(getTC(), reg_idx); + int flatIndex = TheISA::flattenFloatIndex(getTC(), reg_idx); return regs.readFloatRegBits(flatIndex, width); } FloatRegBits readFloatRegBits(int reg_idx) { - int flatIndex = TheISA::flattenIntIndex(getTC(), reg_idx); + int flatIndex = TheISA::flattenFloatIndex(getTC(), reg_idx); return regs.readFloatRegBits(flatIndex); } @@ -271,25 +271,25 @@ class SimpleThread : public ThreadState void setFloatReg(int reg_idx, FloatReg val, int width) { - int flatIndex = TheISA::flattenIntIndex(getTC(), reg_idx); + int flatIndex = TheISA::flattenFloatIndex(getTC(), reg_idx); regs.setFloatReg(flatIndex, val, width); } void setFloatReg(int reg_idx, FloatReg val) { - int flatIndex = TheISA::flattenIntIndex(getTC(), reg_idx); + int flatIndex = TheISA::flattenFloatIndex(getTC(), reg_idx); regs.setFloatReg(flatIndex, val); } void setFloatRegBits(int reg_idx, FloatRegBits val, int width) { - int flatIndex = TheISA::flattenIntIndex(getTC(), reg_idx); + int flatIndex = TheISA::flattenFloatIndex(getTC(), reg_idx); regs.setFloatRegBits(flatIndex, val, width); } void setFloatRegBits(int reg_idx, FloatRegBits val) { - int flatIndex = TheISA::flattenIntIndex(getTC(), reg_idx); + int flatIndex = TheISA::flattenFloatIndex(getTC(), reg_idx); regs.setFloatRegBits(flatIndex, val); } |