diff options
author | Nikos Nikoleris <nikos.nikoleris@gmail.com> | 2015-04-03 11:42:10 -0500 |
---|---|---|
committer | Nikos Nikoleris <nikos.nikoleris@gmail.com> | 2015-04-03 11:42:10 -0500 |
commit | 305e29b98ef369bcf5574a0a462f43c0bbc7ba5b (patch) | |
tree | e2699c1127421c8b8c86b7ebd37706919daa881e /src/cpu | |
parent | 333988a73e06cb4067f113b7043ab68dd0e86c9d (diff) | |
download | gem5-305e29b98ef369bcf5574a0a462f43c0bbc7ba5b.tar.xz |
cpu: fix system total instructions accounting
The totalInstructions counter is only incremented when the whole instruction is
commited and not on every microop. It was incorrectly reset in atomic and
timing cpus.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>"
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/minor/execute.cc | 10 | ||||
-rw-r--r-- | src/cpu/o3/cpu.cc | 10 | ||||
-rw-r--r-- | src/cpu/simple/atomic.cc | 2 | ||||
-rw-r--r-- | src/cpu/simple/timing.cc | 2 |
4 files changed, 10 insertions, 14 deletions
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc index f7b773377..706fdf010 100644 --- a/src/cpu/minor/execute.cc +++ b/src/cpu/minor/execute.cc @@ -840,15 +840,15 @@ Execute::doInstCommitAccounting(MinorDynInstPtr inst) thread->numInst++; thread->numInsts++; cpu.stats.numInsts++; + cpu.system->totalNumInsts++; + + /* Act on events related to instruction counts */ + cpu.comInstEventQueue[inst->id.threadId]->serviceEvents(thread->numInst); + cpu.system->instEventQueue.serviceEvents(cpu.system->totalNumInsts); } thread->numOp++; thread->numOps++; cpu.stats.numOps++; - cpu.system->totalNumInsts++; - - /* Act on events related to instruction counts */ - cpu.comInstEventQueue[inst->id.threadId]->serviceEvents(thread->numInst); - cpu.system->instEventQueue.serviceEvents(cpu.system->totalNumInsts); /* Set the CP SeqNum to the numOps commit number */ if (inst->traceData) diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index fc7643be2..715a530d7 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -1440,16 +1440,16 @@ FullO3CPU<Impl>::instDone(ThreadID tid, DynInstPtr &inst) thread[tid]->numInst++; thread[tid]->numInsts++; committedInsts[tid]++; + system->totalNumInsts++; + + // Check for instruction-count-based events. + comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst); + system->instEventQueue.serviceEvents(system->totalNumInsts); } thread[tid]->numOp++; thread[tid]->numOps++; committedOps[tid]++; - system->totalNumInsts++; - // Check for instruction-count-based events. - comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst); - system->instEventQueue.serviceEvents(system->totalNumInsts); - probeInstCommit(inst->staticInst); } diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index 64280bda0..4c1c45355 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -168,8 +168,6 @@ AtomicSimpleCPU::drainResume() _status = BaseSimpleCPU::Idle; notIdleFraction = 0; } - - system->totalNumInsts = 0; } bool diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 8b95696a3..a3c4e27e8 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -94,8 +94,6 @@ TimingSimpleCPU::TimingSimpleCPU(TimingSimpleCPUParams *p) fetchEvent(this), drainManager(NULL) { _status = Idle; - - system->totalNumInsts = 0; } |