summaryrefslogtreecommitdiff
path: root/src/cpu
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2011-09-27 00:24:43 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-09-27 00:24:43 -0700
commit44ed4849d468b8188bdfc273c8e9a03a8f31c263 (patch)
treedb5907e0a478d4a9e6e479a53a478412d5284a47 /src/cpu
parent2ed3eef9b046472ef20a6c7829e3aa1814d929fb (diff)
downloadgem5-44ed4849d468b8188bdfc273c8e9a03a8f31c263.tar.xz
Faults: Replace calls to genMachineCheckFault with M5PanicFault.
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/o3/lsq_unit.hh5
-rw-r--r--src/cpu/o3/lsq_unit_impl.hh10
2 files changed, 12 insertions, 3 deletions
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index af926759c..3c1af4533 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -38,6 +38,7 @@
#include <queue>
#include "arch/faults.hh"
+#include "arch/generic/debugfaults.hh"
#include "arch/isa_traits.hh"
#include "arch/locked_mem.hh"
#include "arch/mmapped_ipr.hh"
@@ -568,7 +569,9 @@ LSQUnit<Impl>::read(Request *req, Request *sreqLow, Request *sreqHigh,
delete sreqLow;
delete sreqHigh;
}
- return TheISA::genMachineCheckFault();
+ return new GenericISA::M5PanicFault(
+ "Uncachable load [sn:%llx] PC %s\n",
+ load_inst->seqNum, load_inst->pcState());
}
// Check the SQ for any previous stores that might lead to forwarding
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 77ce705bc..acef6ec9d 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -41,6 +41,7 @@
* Korey Sewell
*/
+#include "arch/generic/debugfaults.hh"
#include "arch/locked_mem.hh"
#include "base/str.hh"
#include "config/the_isa.hh"
@@ -539,7 +540,10 @@ LSQUnit<Impl>::checkViolations(int load_idx, DynInstPtr &inst)
++lsqMemOrderViolation;
- return TheISA::genMachineCheckFault();
+ return new GenericISA::M5PanicFault(
+ "Detected fault with inst [sn:%lli] and "
+ "[sn:%lli] at address %#x\n",
+ inst->seqNum, ld_inst->seqNum, ld_eff_addr1);
}
}
@@ -563,7 +567,9 @@ LSQUnit<Impl>::checkViolations(int load_idx, DynInstPtr &inst)
++lsqMemOrderViolation;
- return TheISA::genMachineCheckFault();
+ return new GenericISA::M5PanicFault("Detected fault with "
+ "inst [sn:%lli] and [sn:%lli] at address %#x\n",
+ inst->seqNum, ld_inst->seqNum, ld_eff_addr1);
}
}