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authorJason Lowe-Power <jason@lowepower.com>2019-04-04 14:10:16 -0700
committerJason Lowe-Power <jason@lowepower.com>2019-04-05 17:36:37 +0000
commit529d0cdbfe77a4ad655fe57f2d5320dbb760ef13 (patch)
tree8c2433849ffe84bf3278140ea9a260e74ace202e /src/cpu
parent07eca72e1a51910e8ff785c224bf3820183d3664 (diff)
downloadgem5-529d0cdbfe77a4ad655fe57f2d5320dbb760ef13.tar.xz
mem: Reverse order of write/read mem queue check
For atomic RMW instructions that go directly to memory, we want to put them on the write queue instead of the read queue. Swap the if/else condition to accomplish this. Note: This is ignoring the read latency of the RMW, but these instructions should usually be handled in caches anyway. Change-Id: I62dbfff3a16ac470f1ebdb489abe878962b20bb6 Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17828 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
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