summaryrefslogtreecommitdiff
path: root/src/cpu
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2011-08-02 11:51:16 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-08-02 11:51:16 -0700
commit6230668f5e7e4d7298d039a99d3bd73d9064bea9 (patch)
treeaaee702dc1cb9f023e719d2d82576907367f6a72 /src/cpu
parent1c68c32cc9926a53bd5df2d85d851541383d34d7 (diff)
downloadgem5-6230668f5e7e4d7298d039a99d3bd73d9064bea9.tar.xz
O3: Get rid of the raw ExtMachInst constructor on DynInsts.
This constructor assumes that the ExtMachInst can be decoded directly into a StaticInst that's useful to execute. With the advent of microcoded instructions that's no longer true.
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/base_dyn_inst.hh10
-rw-r--r--src/cpu/base_dyn_inst_impl.hh15
-rw-r--r--src/cpu/o3/dyn_inst.hh5
-rw-r--r--src/cpu/o3/dyn_inst_impl.hh9
-rw-r--r--src/cpu/ozone/dyn_inst_impl.hh8
5 files changed, 0 insertions, 47 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index f0d36cc83..18a178c4a 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -380,16 +380,6 @@ class BaseDynInst : public FastAlloc, public RefCounted
BaseDynInst(StaticInstPtr staticInst, TheISA::PCState pc,
TheISA::PCState predPC, InstSeqNum seq_num, ImplCPU *cpu);
- /** BaseDynInst constructor given a binary instruction.
- * @param inst The binary instruction.
- * @param _pc The PC state for the instruction.
- * @param _predPC The predicted next PC state for the instruction.
- * @param seq_num The sequence number of the instruction.
- * @param cpu Pointer to the instruction's CPU.
- */
- BaseDynInst(TheISA::ExtMachInst inst, TheISA::PCState pc,
- TheISA::PCState predPC, InstSeqNum seq_num, ImplCPU *cpu);
-
/** BaseDynInst constructor given a StaticInst pointer.
* @param _staticInst The StaticInst for this BaseDynInst.
*/
diff --git a/src/cpu/base_dyn_inst_impl.hh b/src/cpu/base_dyn_inst_impl.hh
index 226291e1d..bae047912 100644
--- a/src/cpu/base_dyn_inst_impl.hh
+++ b/src/cpu/base_dyn_inst_impl.hh
@@ -90,21 +90,6 @@ BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst,
}
template <class Impl>
-BaseDynInst<Impl>::BaseDynInst(TheISA::ExtMachInst inst,
- TheISA::PCState _pc, TheISA::PCState _predPC,
- InstSeqNum seq_num, ImplCPU *cpu)
- : staticInst(inst, _pc.instAddr()), traceData(NULL), cpu(cpu)
-{
- seqNum = seq_num;
-
- pc = _pc;
- predPC = _predPC;
- predTaken = false;
-
- initVars();
-}
-
-template <class Impl>
BaseDynInst<Impl>::BaseDynInst(StaticInstPtr &_staticInst)
: staticInst(_staticInst), traceData(NULL)
{
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 5fe1b2609..dc2d32eac 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -90,11 +90,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
TheISA::PCState pc, TheISA::PCState predPC,
InstSeqNum seq_num, O3CPU *cpu);
- /** BaseDynInst constructor given a binary instruction. */
- BaseO3DynInst(ExtMachInst inst,
- TheISA::PCState pc, TheISA::PCState predPC,
- InstSeqNum seq_num, O3CPU *cpu);
-
/** BaseDynInst constructor given a static inst pointer. */
BaseO3DynInst(StaticInstPtr &_staticInst);
diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index 9216c5fa7..44b353253 100644
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -53,15 +53,6 @@ BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst,
}
template <class Impl>
-BaseO3DynInst<Impl>::BaseO3DynInst(ExtMachInst inst,
- TheISA::PCState pc, TheISA::PCState predPC,
- InstSeqNum seq_num, O3CPU *cpu)
- : BaseDynInst<Impl>(inst, pc, predPC, seq_num, cpu)
-{
- initVars();
-}
-
-template <class Impl>
BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr &_staticInst)
: BaseDynInst<Impl>(_staticInst)
{
diff --git a/src/cpu/ozone/dyn_inst_impl.hh b/src/cpu/ozone/dyn_inst_impl.hh
index 002b39fa2..5eb8ea8da 100644
--- a/src/cpu/ozone/dyn_inst_impl.hh
+++ b/src/cpu/ozone/dyn_inst_impl.hh
@@ -47,14 +47,6 @@ OzoneDynInst<Impl>::OzoneDynInst(OzoneCPU *cpu)
}
template <class Impl>
-OzoneDynInst<Impl>::OzoneDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC,
- InstSeqNum seq_num, OzoneCPU *cpu)
- : BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu)
-{
- initInstPtrs();
-}
-
-template <class Impl>
OzoneDynInst<Impl>::OzoneDynInst(StaticInstPtr _staticInst)
: BaseDynInst<Impl>(_staticInst)
{