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authorGabe Black <gblack@eecs.umich.edu>2010-09-13 21:58:34 -0700
committerGabe Black <gblack@eecs.umich.edu>2010-09-13 21:58:34 -0700
commit8f3fbd2d13dbfc3699dc43b27b3c2a389049078d (patch)
tree10c9d799ea81529b13fb924094a12b462c168dcd /src/cpu
parent6833ca7eedd351596bb1518620af7465f5172fcd (diff)
downloadgem5-8f3fbd2d13dbfc3699dc43b27b3c2a389049078d.tar.xz
CPU: Get rid of the now unnecessary getInst/setInst family of functions.
This code is no longer needed because of the preceeding change which adds a StaticInstPtr parameter to the fault's invoke method, obviating the only use for this pair of functions.
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/checker/cpu_impl.hh4
-rw-r--r--src/cpu/checker/thread_context.hh3
-rw-r--r--src/cpu/inorder/thread_context.cc6
-rw-r--r--src/cpu/inorder/thread_context.hh5
-rw-r--r--src/cpu/o3/commit_impl.hh6
-rwxr-xr-xsrc/cpu/o3/thread_context.hh4
-rwxr-xr-xsrc/cpu/o3/thread_context_impl.hh7
-rw-r--r--src/cpu/ozone/cpu.hh3
-rw-r--r--src/cpu/ozone/cpu_impl.hh8
-rw-r--r--src/cpu/ozone/inorder_back_end_impl.hh6
-rw-r--r--src/cpu/ozone/lw_back_end_impl.hh3
-rw-r--r--src/cpu/simple/base.cc4
-rw-r--r--src/cpu/simple_thread.cc1
-rw-r--r--src/cpu/thread_context.hh6
-rw-r--r--src/cpu/thread_state.cc2
-rw-r--r--src/cpu/thread_state.hh11
16 files changed, 0 insertions, 79 deletions
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 494298cad..10a9d1177 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -209,10 +209,6 @@ Checker<DynInstPtr>::verify(DynInstPtr &completed_inst)
thread->getTC()));
#endif
-#if FULL_SYSTEM
- thread->setInst(machInst);
-#endif // FULL_SYSTEM
-
fault = inst->getFault();
}
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index ef7d4c643..5bd3ed734 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -154,9 +154,6 @@ class CheckerThreadContext : public ThreadContext
int threadId() { return actualTC->threadId(); }
// @todo: Do I need this?
- MachInst getInst() { return actualTC->getInst(); }
-
- // @todo: Do I need this?
void copyArchRegs(ThreadContext *tc)
{
actualTC->copyArchRegs(tc);
diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc
index c7a500a63..e6d0af2cc 100644
--- a/src/cpu/inorder/thread_context.cc
+++ b/src/cpu/inorder/thread_context.cc
@@ -171,12 +171,6 @@ InOrderThreadContext::unserialize(Checkpoint *cp, const std::string &section)
panic("unserialize unimplemented");
}
-TheISA::MachInst
-InOrderThreadContext:: getInst()
-{
- return thread->getInst();
-}
-
void
InOrderThreadContext::copyArchRegs(ThreadContext *src_tc)
diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh
index 3ed2e7f50..0c0f563c0 100644
--- a/src/cpu/inorder/thread_context.hh
+++ b/src/cpu/inorder/thread_context.hh
@@ -177,11 +177,6 @@ class InOrderThreadContext : public ThreadContext
/** Returns this thread's ID number. */
int getThreadNum() { return thread->readTid(); }
- /** Returns the instruction this thread is currently committing.
- * Only used when an instruction faults.
- */
- TheISA::MachInst getInst();
-
/** Copies the architectural registers from another TC into this TC. */
void copyArchRegs(ThreadContext *src_tc);
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 468781e4d..87f18d4e4 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1033,12 +1033,6 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
}
#endif
- // DTB will sometimes need the machine instruction for when
- // faults happen. So we will set it here, prior to the DTB
- // possibly needing it for its fault.
- thread[tid]->setInst(
- static_cast<TheISA::MachInst>(head_inst->staticInst->machInst));
-
if (inst_fault != NoFault) {
DPRINTF(Commit, "Inst [sn:%lli] PC %#x has a fault\n",
head_inst->seqNum, head_inst->readPC());
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index 78b266014..b7790cfda 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -151,10 +151,6 @@ class O3ThreadContext : public ThreadContext
/** Samples the function profiling information. */
virtual void profileSample();
#endif
- /** Returns the instruction this thread is currently committing.
- * Only used when an instruction faults.
- */
- virtual TheISA::MachInst getInst();
/** Copies the architectural registers from another TC into this TC. */
virtual void copyArchRegs(ThreadContext *tc);
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index a1a96933a..0b7a2b172 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -216,13 +216,6 @@ O3ThreadContext<Impl>::profileSample()
#endif
template <class Impl>
-TheISA::MachInst
-O3ThreadContext<Impl>:: getInst()
-{
- return thread->getInst();
-}
-
-template <class Impl>
void
O3ThreadContext<Impl>::copyArchRegs(ThreadContext *tc)
{
diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index fba5886f8..ad23b2790 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -171,9 +171,6 @@ class OzoneCPU : public BaseCPU
int threadId();
- // Also somewhat obnoxious. Really only used for the TLB fault.
- TheISA::MachInst getInst();
-
void copyArchRegs(ThreadContext *tc);
void clearArchRegs();
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index c09dd9046..08da1724b 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -771,7 +771,6 @@ OzoneCPU<Impl>::OzoneTC::takeOverFrom(ThreadContext *old_context)
setCpuId(old_context->cpuId());
setContextId(old_context->contextId());
- thread->setInst(old_context->getInst());
#if !FULL_SYSTEM
setFuncExeInst(old_context->readFuncExeInst());
#else
@@ -863,13 +862,6 @@ OzoneCPU<Impl>::OzoneTC::threadId()
}
template <class Impl>
-TheISA::MachInst
-OzoneCPU<Impl>::OzoneTC::getInst()
-{
- return thread->getInst();
-}
-
-template <class Impl>
void
OzoneCPU<Impl>::OzoneTC::copyArchRegs(ThreadContext *tc)
{
diff --git a/src/cpu/ozone/inorder_back_end_impl.hh b/src/cpu/ozone/inorder_back_end_impl.hh
index 2d4d225c7..b48e8f692 100644
--- a/src/cpu/ozone/inorder_back_end_impl.hh
+++ b/src/cpu/ozone/inorder_back_end_impl.hh
@@ -304,12 +304,6 @@ InorderBackEnd<Impl>::executeInsts()
thread->inSyscall = true;
- // Hack for now; DTB will sometimes need the machine instruction
- // for when faults happen. So we will set it here, prior to the
- // DTB possibly needing it for this translation.
- thread->setInst(
- static_cast<TheISA::MachInst>(inst->staticInst->machInst));
-
// Consider holding onto the trap and waiting until the trap event
// happens for this to be executed.
inst_fault->invoke(xc);
diff --git a/src/cpu/ozone/lw_back_end_impl.hh b/src/cpu/ozone/lw_back_end_impl.hh
index cbc386cb0..465fccbdb 100644
--- a/src/cpu/ozone/lw_back_end_impl.hh
+++ b/src/cpu/ozone/lw_back_end_impl.hh
@@ -1171,9 +1171,6 @@ LWBackEnd<Impl>::commitInst(int inst_num)
}
#endif
- thread->setInst(
- static_cast<TheISA::MachInst>(inst->staticInst->machInst));
-
handleFault(inst_fault);
return false;
}
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 98feb8bf5..088d5ff16 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -456,10 +456,6 @@ BaseSimpleCPU::preExecute()
DPRINTF(Decode,"Decode: Decoded %s instruction: 0x%x\n",
curStaticInst->getName(), curStaticInst->machInst);
#endif // TRACING_ON
-
-#if FULL_SYSTEM
- thread->setInst(inst);
-#endif // FULL_SYSTEM
}
}
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index ad69719ee..40f7f3cdb 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -181,7 +181,6 @@ SimpleThread::copyState(ThreadContext *oldContext)
#if !FULL_SYSTEM
funcExeInst = oldContext->readFuncExeInst();
#endif
- inst = oldContext->getInst();
_threadId = oldContext->threadId();
_contextId = oldContext->contextId();
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 84ef57922..3d7be5256 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -171,10 +171,6 @@ class ThreadContext
virtual void profileSample() = 0;
#endif
- // Also somewhat obnoxious. Really only used for the TLB fault.
- // However, may be quite useful in SPARC.
- virtual TheISA::MachInst getInst() = 0;
-
virtual void copyArchRegs(ThreadContext *tc) = 0;
virtual void clearArchRegs() = 0;
@@ -352,8 +348,6 @@ class ProxyThreadContext : public ThreadContext
void profileClear() { return actualTC->profileClear(); }
void profileSample() { return actualTC->profileSample(); }
#endif
- // @todo: Do I need this?
- MachInst getInst() { return actualTC->getInst(); }
// @todo: Do I need this?
void copyArchRegs(ThreadContext *tc) { actualTC->copyArchRegs(tc); }
diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc
index c62a7a3be..dedeccb3e 100644
--- a/src/cpu/thread_state.cc
+++ b/src/cpu/thread_state.cc
@@ -75,7 +75,6 @@ ThreadState::serialize(std::ostream &os)
SERIALIZE_ENUM(_status);
// thread_num and cpu_id are deterministic from the config
SERIALIZE_SCALAR(funcExeInst);
- SERIALIZE_SCALAR(inst);
#if FULL_SYSTEM
Tick quiesceEndTick = 0;
@@ -94,7 +93,6 @@ ThreadState::unserialize(Checkpoint *cp, const std::string &section)
UNSERIALIZE_ENUM(_status);
// thread_num and cpu_id are deterministic from the config
UNSERIALIZE_SCALAR(funcExeInst);
- UNSERIALIZE_SCALAR(inst);
#if FULL_SYSTEM
Tick quiesceEndTick;
diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index cf637aeda..06707894d 100644
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -122,12 +122,6 @@ struct ThreadState {
void setMemPort(TranslatingPort *_port) { port = _port; }
#endif
- /** Sets the current instruction being committed. */
- void setInst(TheISA::MachInst _inst) { inst = _inst; }
-
- /** Returns the current instruction being committed. */
- TheISA::MachInst getInst() { return inst; }
-
/** Reads the number of instructions functionally executed and
* committed.
*/
@@ -205,11 +199,6 @@ struct ThreadState {
Process *process;
#endif
- /** Current instruction the thread is committing. Only set and
- * used for DTB faults currently.
- */
- TheISA::MachInst inst;
-
public:
/**
* Temporary storage to pass the source address from copy_load to