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authorGabe Black <gabeblack@google.com>2017-12-12 23:12:30 -0800
committerGabe Black <gabeblack@google.com>2017-12-13 23:51:05 +0000
commit93a168c25e5bb396ee749d25a2ab80ce7bec1764 (patch)
treef4db24d8b5d0fa7f4fcb69420d24afa2583bc3e3 /src/cpu
parent36d5e8925526b15d1638ac44380e4ada5af16e08 (diff)
downloadgem5-93a168c25e5bb396ee749d25a2ab80ce7bec1764.tar.xz
cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp and memAccInst.
Neither of these were used, particularly memAccInst. Change-Id: I4ac9e44cf624e5de42519d586d7b699f08a2cdfc Reviewed-on: https://gem5-review.googlesource.com/6601 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/o3/dyn_inst.hh19
-rw-r--r--src/cpu/static_inst.hh25
2 files changed, 0 insertions, 44 deletions
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 0643e7e30..8a0ae1d56 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -429,25 +429,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
panic("MIPS MT not defined for O3 CPU.\n");
}
#endif
-
- public:
- /** Calculates EA part of a memory instruction. Currently unused,
- * though it may be useful in the future if we want to split
- * memory operations into EA calculation and memory access parts.
- */
- Fault calcEA()
- {
- return this->staticInst->eaCompInst()->execute(this, this->traceData);
- }
-
- /** Does the memory access part of a memory instruction. Currently unused,
- * though it may be useful in the future if we want to split
- * memory operations into EA calculation and memory access parts.
- */
- Fault memAccess()
- {
- return this->staticInst->memAccInst()->execute(this, this->traceData);
- }
};
#endif // __CPU_O3_ALPHA_DYN_INST_HH__
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index a58df00c7..a4077e1d0 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -203,28 +203,8 @@ class StaticInst : public RefCounted, public StaticInstFlags
const RegId& srcRegIdx(int i) const { return _srcRegIdx[i]; }
/// Pointer to a statically allocated "null" instruction object.
- /// Used to give eaCompInst() and memAccInst() something to return
- /// when called on non-memory instructions.
static StaticInstPtr nullStaticInstPtr;
- /**
- * Memory references only: returns "fake" instruction representing
- * the effective address part of the memory operation. Used to
- * obtain the dependence info (numSrcRegs and srcRegIdx[]) for
- * just the EA computation.
- */
- virtual const
- StaticInstPtr &eaCompInst() const { return nullStaticInstPtr; }
-
- /**
- * Memory references only: returns "fake" instruction representing
- * the memory access part of the memory operation. Used to
- * obtain the dependence info (numSrcRegs and srcRegIdx[]) for
- * just the memory access (not the EA computation).
- */
- virtual const
- StaticInstPtr &memAccInst() const { return nullStaticInstPtr; }
-
/// The binary machine instruction.
const ExtMachInst machInst;
@@ -272,11 +252,6 @@ class StaticInst : public RefCounted, public StaticInstFlags
virtual Fault execute(ExecContext *xc,
Trace::InstRecord *traceData) const = 0;
- virtual Fault eaComp(ExecContext *xc,
- Trace::InstRecord *traceData) const
- {
- panic("eaComp not defined!");
- }
virtual Fault initiateAcc(ExecContext *xc,
Trace::InstRecord *traceData) const