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authorAndreas Hansson <andreas.hansson@arm.com>2014-12-02 06:07:36 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2014-12-02 06:07:36 -0500
commit9779ba2e37a753df407b976fc4b299d936ea62b8 (patch)
treee25e0cf44834427975767e88bf3dcfc6359ed4a8 /src/cpu
parent25bfc249998b26403d50587eb66e6ee5e6de5b58 (diff)
downloadgem5-9779ba2e37a753df407b976fc4b299d936ea62b8.tar.xz
mem: Add const getters for write packet data
This patch takes a first step in tightening up how we use the data pointer in write packets. A const getter is added for the pointer itself (getConstPtr), and a number of member functions are also made const accordingly. In a range of places throughout the memory system the new member is used. The patch also removes the unused isReadWrite function.
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/inorder/resources/cache_unit.cc12
-rw-r--r--src/cpu/inorder/resources/fetch_unit.cc2
-rw-r--r--src/cpu/minor/execute.cc2
-rw-r--r--src/cpu/minor/lsq.cc2
-rw-r--r--src/cpu/o3/fetch_impl.hh2
-rw-r--r--src/cpu/simple/atomic.cc2
-rw-r--r--src/cpu/testers/memtest/memtest.cc1
-rw-r--r--src/cpu/testers/rubytest/Check.cc2
8 files changed, 13 insertions, 12 deletions
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc
index 251369e01..3a44986e2 100644
--- a/src/cpu/inorder/resources/cache_unit.cc
+++ b/src/cpu/inorder/resources/cache_unit.cc
@@ -68,7 +68,7 @@ using namespace ThePipeline;
#if TRACING_ON
static std::string
-printMemData(uint8_t *data, unsigned size)
+printMemData(const uint8_t *data, unsigned size)
{
std::stringstream dataStr;
for (unsigned pos = 0; pos < size; pos++) {
@@ -855,7 +855,7 @@ CacheUnit::doCacheAccess(DynInstPtr inst, uint64_t *write_res,
DPRINTF(InOrderCachePort,
"[tid:%u]: [sn:%i]: Storing data: %s\n",
tid, inst->seqNum,
- printMemData(cache_req->dataPkt->getPtr<uint8_t>(),
+ printMemData(cache_req->dataPkt->getConstPtr<uint8_t>(),
cache_req->dataPkt->getSize()));
if (mem_req->isCondSwap()) {
@@ -1061,9 +1061,9 @@ CacheUnit::processCacheCompletion(PacketPtr pkt)
DPRINTF(InOrderCachePort,
"[tid:%u]: [sn:%i]: Bytes loaded were: %s\n",
tid, inst->seqNum,
- (split_pkt) ? printMemData(split_pkt->getPtr<uint8_t>(),
+ (split_pkt) ? printMemData(split_pkt->getConstPtr<uint8_t>(),
split_pkt->getSize()) :
- printMemData(cache_pkt->getPtr<uint8_t>(),
+ printMemData(cache_pkt->getConstPtr<uint8_t>(),
cache_pkt->getSize()));
} else if(inst->isStore()) {
assert(cache_pkt->isWrite());
@@ -1071,9 +1071,9 @@ CacheUnit::processCacheCompletion(PacketPtr pkt)
DPRINTF(InOrderCachePort,
"[tid:%u]: [sn:%i]: Bytes stored were: %s\n",
tid, inst->seqNum,
- (split_pkt) ? printMemData(split_pkt->getPtr<uint8_t>(),
+ (split_pkt) ? printMemData(split_pkt->getConstPtr<uint8_t>(),
split_pkt->getSize()) :
- printMemData(cache_pkt->getPtr<uint8_t>(),
+ printMemData(cache_pkt->getConstPtr<uint8_t>(),
cache_pkt->getSize()));
}
diff --git a/src/cpu/inorder/resources/fetch_unit.cc b/src/cpu/inorder/resources/fetch_unit.cc
index 6892688b2..13864e589 100644
--- a/src/cpu/inorder/resources/fetch_unit.cc
+++ b/src/cpu/inorder/resources/fetch_unit.cc
@@ -503,7 +503,7 @@ FetchUnit::processCacheCompletion(PacketPtr pkt)
// Copy Data to pendingFetch queue...
(*pend_it)->block = new uint8_t[cacheBlkSize];
- memcpy((*pend_it)->block, cache_pkt->getPtr<uint8_t>(), cacheBlkSize);
+ memcpy((*pend_it)->block, cache_pkt->getConstPtr<uint8_t>(), cacheBlkSize);
(*pend_it)->valid = true;
cache_req->setMemAccPending(false);
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index 123128358..69cb9a239 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -355,7 +355,7 @@ Execute::handleMemResponse(MinorDynInstPtr inst,
if (is_load && packet->getSize() > 0) {
DPRINTF(MinorMem, "Memory data[0]: 0x%x\n",
- static_cast<unsigned int>(packet->getPtr<uint8_t>()[0]));
+ static_cast<unsigned int>(packet->getConstPtr<uint8_t>()[0]));
}
/* Complete the memory access instruction */
diff --git a/src/cpu/minor/lsq.cc b/src/cpu/minor/lsq.cc
index cae0d3666..fca580085 100644
--- a/src/cpu/minor/lsq.cc
+++ b/src/cpu/minor/lsq.cc
@@ -560,7 +560,7 @@ LSQ::SplitDataRequest::retireResponse(PacketPtr response)
* by the response fragment */
std::memcpy(
data + (response->req->getVaddr() - request.getVaddr()),
- response->getPtr<uint8_t>(),
+ response->getConstPtr<uint8_t>(),
response->req->getSize());
}
}
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 1c9799e41..47a64a9bf 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -388,7 +388,7 @@ DefaultFetch<Impl>::processCacheCompletion(PacketPtr pkt)
return;
}
- memcpy(fetchBuffer[tid], pkt->getPtr<uint8_t>(), fetchBufferSize);
+ memcpy(fetchBuffer[tid], pkt->getConstPtr<uint8_t>(), fetchBufferSize);
fetchBufferValid[tid] = true;
// Wake up the CPU (if it went to sleep and was waiting on
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 06969f3e3..8dcae01c5 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -469,7 +469,7 @@ AtomicSimpleCPU::writeMem(uint8_t *data, unsigned size,
if (req->isSwap()) {
assert(res);
- memcpy(res, pkt.getPtr<uint8_t>(), fullSize);
+ memcpy(res, pkt.getConstPtr<uint8_t>(), fullSize);
}
}
diff --git a/src/cpu/testers/memtest/memtest.cc b/src/cpu/testers/memtest/memtest.cc
index d949178c2..082737f8a 100644
--- a/src/cpu/testers/memtest/memtest.cc
+++ b/src/cpu/testers/memtest/memtest.cc
@@ -173,6 +173,7 @@ MemTest::completeRequest(PacketPtr pkt)
safe_cast<MemTestSenderState *>(pkt->senderState);
uint8_t *data = state->data;
+ // @todo: This should really be a const pointer
uint8_t *pkt_data = pkt->getPtr<uint8_t>();
//Remove the address from the list of outstanding
diff --git a/src/cpu/testers/rubytest/Check.cc b/src/cpu/testers/rubytest/Check.cc
index 9de766077..19d0623c0 100644
--- a/src/cpu/testers/rubytest/Check.cc
+++ b/src/cpu/testers/rubytest/Check.cc
@@ -197,7 +197,7 @@ Check::initiateAction()
pkt->dataDynamic(writeData);
DPRINTF(RubyTest, "data 0x%x check 0x%x\n",
- *(pkt->getPtr<uint8_t>()), *writeData);
+ *(pkt->getConstPtr<uint8_t>()), *writeData);
// push the subblock onto the sender state. The sequencer will
// update the subblock on the return