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authorGabe Black <gblack@eecs.umich.edu>2011-08-07 15:41:07 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-08-07 15:41:07 -0700
commita9b793115679dbf13e0ca7f717b8be3ec14b3ea2 (patch)
tree858dd9f53d83e84861a4ab801911a7b644dfc539 /src/cpu
parenta1aaeac2f9f8ab023e1ecadfdb2f1324988d341d (diff)
downloadgem5-a9b793115679dbf13e0ca7f717b8be3ec14b3ea2.tar.xz
O3: Let squashed and deferred instructions issue.
Let squahsed and deferred instructions issue so they don't accumulate and clog up the CPU.
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/o3/inst_queue_impl.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index def2c8f97..9f1dc77b2 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -1097,7 +1097,7 @@ InstructionQueue<Impl>::getDeferredMemInstToExecute()
{
for (ListIt it = deferredMemInsts.begin(); it != deferredMemInsts.end();
++it) {
- if ((*it)->translationCompleted) {
+ if ((*it)->translationCompleted || (*it)->isSquashed()) {
DynInstPtr ret = *it;
deferredMemInsts.erase(it);
return ret;