cpu: Make accesses to comInstEventQueue indirect through methods.

This lets us move the event queue itself around, or change how those
services are provided.

Change-Id: Ie36665b353cf9788968f253cf281a854a6eff4f4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22107
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>

7 files changed, 39 insertions, 17 deletions

diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 7e0e79e96..a4ffb1031 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -191,7 +191,7 @@ BaseCPU::BaseCPU(Params *p, bool is_checker)
         *counter = numThreads;
         for (ThreadID tid = 0; tid < numThreads; ++tid) {
             Event *event = new CountedExitEvent(cause, *counter);
-            comInstEventQueue[tid]->schedule(event, p->max_insts_all_threads);
+            scheduleInstCountEvent(tid, event, p->max_insts_all_threads);
         }
     }
 
@@ -726,16 +726,16 @@ BaseCPU::unserialize(CheckpointIn &cp)
 void
 BaseCPU::scheduleInstStop(ThreadID tid, Counter insts, const char *cause)
 {
-    const Tick now(comInstEventQueue[tid]->getCurTick());
+    const Tick now(getCurrentInstCount(tid));
     Event *event(new LocalSimLoopExitEvent(cause, 0));
 
-    comInstEventQueue[tid]->schedule(event, now + insts);
+    scheduleInstCountEvent(tid, event, now + insts);
 }
 
-uint64_t
+Tick
 BaseCPU::getCurrentInstCount(ThreadID tid)
 {
-    return Tick(comInstEventQueue[tid]->getCurTick());
+    return comInstEventQueue[tid]->getCurTick();
 }
 
 AddressMonitor::AddressMonitor() {
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index cb23cb1ba..0424945cb 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -465,6 +465,31 @@ class BaseCPU : public ClockedObject
      */
     uint64_t getCurrentInstCount(ThreadID tid);
 
+    Tick
+    nextInstEventCount(ThreadID tid)
+    {
+        return comInstEventQueue[tid]->empty() ?
+            MaxTick : comInstEventQueue[tid]->nextTick();
+    }
+
+    void
+    serviceInstCountEvents(ThreadID tid, Tick count)
+    {
+        comInstEventQueue[tid]->serviceEvents(count);
+    }
+
+    void
+    scheduleInstCountEvent(ThreadID tid, Event *event, Tick count)
+    {
+        comInstEventQueue[tid]->schedule(event, count);
+    }
+
+    void
+    descheduleInstCountEvent(ThreadID tid, Event *event)
+    {
+        comInstEventQueue[tid]->deschedule(event);
+    }
+
   public:
     /**
      * @{
diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc
index 0b3888976..384abb0eb 100644
--- a/src/cpu/kvm/base.cc
+++ b/src/cpu/kvm/base.cc
@@ -630,9 +630,7 @@ BaseKvmCPU::tick()
 
       case RunningServiceCompletion:
       case Running: {
-          const uint64_t nextInstEvent(
-              !comInstEventQueue[0]->empty() ?
-              comInstEventQueue[0]->nextTick() : UINT64_MAX);
+          const uint64_t nextInstEvent(nextInstEventCount(0));
           // Enter into KVM and complete pending IO instructions if we
           // have an instruction event pending.
           const Tick ticksToExecute(
@@ -688,7 +686,7 @@ BaseKvmCPU::tick()
           // Service any pending instruction events. The vCPU should
           // have exited in time for the event using the instruction
           // counter configured by setupInstStop().
-          comInstEventQueue[0]->serviceEvents(ctrInsts);
+          serviceInstCountEvents(0, ctrInsts);
 
           if (tryDrain())
               _status = Idle;
@@ -1348,11 +1346,10 @@ BaseKvmCPU::ioctlRun()
 void
 BaseKvmCPU::setupInstStop()
 {
-    if (comInstEventQueue[0]->empty()) {
+    Tick next = nextInstEventCount(0);
+    if (next == MaxTick) {
         setupInstCounter(0);
     } else {
-        const uint64_t next(comInstEventQueue[0]->nextTick());
-
         assert(next > ctrInsts);
         setupInstCounter(next - ctrInsts);
     }
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index 24506fceb..9317f61f4 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -870,7 +870,7 @@ Execute::doInstCommitAccounting(MinorDynInstPtr inst)
         cpu.system->totalNumInsts++;
 
         /* Act on events related to instruction counts */
-        cpu.comInstEventQueue[inst->id.threadId]->serviceEvents(thread->numInst);
+        cpu.serviceInstCountEvents(inst->id.threadId, thread->numInst);
     }
     thread->numOp++;
     thread->numOps++;
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 5871e6584..e49d4997e 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -1521,7 +1521,7 @@ FullO3CPU<Impl>::instDone(ThreadID tid, const DynInstPtr &inst)
         system->totalNumInsts++;
 
         // Check for instruction-count-based events.
-        comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
+        serviceInstCountEvents(tid, thread[tid]->numInst);
     }
     thread[tid]->numOp++;
     thread[tid]->numOps++;
diff --git a/src/cpu/o3/probe/elastic_trace.cc b/src/cpu/o3/probe/elastic_trace.cc
index 36d8297d1..586688600 100644
--- a/src/cpu/o3/probe/elastic_trace.cc
+++ b/src/cpu/o3/probe/elastic_trace.cc
@@ -109,8 +109,8 @@ ElasticTrace::regProbeListeners()
     } else {
         // Schedule an event to register all elastic trace probes when
         // specified no. of instructions are committed.
-        cpu->comInstEventQueue[(ThreadID)0]->schedule(&regEtraceListenersEvent,
-                                                      startTraceInst);
+        cpu->scheduleInstCountEvent(
+                0, &regEtraceListenersEvent, startTraceInst);
     }
 }
 
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 248494b40..fc07fedc0 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -500,7 +500,7 @@ BaseSimpleCPU::preExecute()
     t_info.setMemAccPredicate(true);
 
     // check for instruction-count-based events
-    comInstEventQueue[curThread]->serviceEvents(t_info.numInst);
+    serviceInstCountEvents(curThread, t_info.numInst);
 
     // decode the instruction
     inst = gtoh(inst);