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authorGabe Black <gblack@eecs.umich.edu>2007-06-13 20:09:03 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-06-13 20:09:03 +0000
commitcd8f604cc9baa65bf59ecf26e3380595418bc046 (patch)
tree691976be5db4bf48337976efbae20b9c2625cc00 /src/cpu
parent5fd567425d9c2624e46dde692d8973ee8008d669 (diff)
downloadgem5-cd8f604cc9baa65bf59ecf26e3380595418bc046.tar.xz
Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst.
src/arch/x86/predecoder.cc: Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes. --HG-- extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/o3/fetch_impl.hh2
-rw-r--r--src/cpu/simple/base.cc10
-rw-r--r--src/cpu/simple/base.hh3
3 files changed, 9 insertions, 6 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index ff4617fcc..ab55ec744 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1128,7 +1128,7 @@ DefaultFetch<Impl>::fetch(bool &status_change)
(&cacheData[tid][offset]));
predecoder.setTC(cpu->thread[tid]->getTC());
- predecoder.moreBytes(fetch_PC, 0, inst);
+ predecoder.moreBytes(fetch_PC, fetch_PC, 0, inst);
ext_inst = predecoder.getExtMachInst();
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index b4371b2c4..b97eabf33 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -336,13 +336,12 @@ BaseSimpleCPU::setupFetchRequest(Request *req)
DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",threadPC,
thread->readNextPC(),thread->readNextNPC());
#else
- DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p",threadPC,
+ DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p\n",threadPC,
thread->readNextPC());
#endif
- const Addr PCMask = ~((Addr)sizeof(MachInst) - 1);
- Addr fetchPC = threadPC + fetchOffset;
- req->setVirt(0, fetchPC & PCMask, sizeof(MachInst), 0, threadPC);
+ Addr fetchPC = (threadPC & PCMask) + fetchOffset;
+ req->setVirt(0, fetchPC, sizeof(MachInst), 0, threadPC);
Fault fault = thread->translateInstReq(req);
@@ -381,7 +380,8 @@ BaseSimpleCPU::preExecute()
predecoder.setTC(thread->getTC());
//If more fetch data is needed, pass it in.
if(predecoder.needMoreBytes())
- predecoder.moreBytes(thread->readPC() + fetchOffset, 0, inst);
+ predecoder.moreBytes(thread->readPC(),
+ (thread->readPC() & PCMask) + fetchOffset, 0, inst);
else
predecoder.process();
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index b25790e92..d221baca8 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -166,6 +166,9 @@ class BaseSimpleCPU : public BaseCPU
return numInst - startNumInst;
}
+ // Mask to align PCs to MachInst sized boundaries
+ static const Addr PCMask = ~((Addr)sizeof(TheISA::MachInst) - 1);
+
// number of simulated memory references
Stats::Scalar<> numMemRefs;