summaryrefslogtreecommitdiff
path: root/src/cpu
diff options
context:
space:
mode:
authorMatt Horsnell <Matt.Horsnell@arm.com>2011-01-18 16:30:05 -0600
committerMatt Horsnell <Matt.Horsnell@arm.com>2011-01-18 16:30:05 -0600
commitb13a79ee717b876e4bc837ba95985abd4d18162f (patch)
treecc11aa8c68e1a22854f2201bf6073e69db88e84e /src/cpu
parentc98df6f8c2f3a3685fd9210ccaee2fac07e4f604 (diff)
downloadgem5-b13a79ee717b876e4bc837ba95985abd4d18162f.tar.xz
O3: Fix some variable length instruction issues with the O3 CPU and ARM ISA.
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/o3/fetch_impl.hh14
1 files changed, 10 insertions, 4 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 736a66c64..927af42c3 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -384,7 +384,7 @@ DefaultFetch<Impl>::processCacheCompletion(PacketPtr pkt)
{
ThreadID tid = pkt->req->threadId();
- DPRINTF(Fetch, "[tid:%u] Waking up from cache miss.\n",tid);
+ DPRINTF(Fetch, "[tid:%u] Waking up from cache miss.\n", tid);
assert(!pkt->wasNacked());
@@ -1011,7 +1011,7 @@ DefaultFetch<Impl>::buildInst(ThreadID tid, StaticInstPtr staticInst,
instruction->setThreadState(cpu->thread[tid]);
DPRINTF(Fetch, "[tid:%i]: Instruction PC %#x (%d) created "
- "[sn:%lli]\n", tid, thisPC.instAddr(),
+ "[sn:%lli].\n", tid, thisPC.instAddr(),
thisPC.microPC(), seq);
DPRINTF(Fetch, "[tid:%i]: Instruction is: %s\n", tid,
@@ -1180,7 +1180,6 @@ DefaultFetch<Impl>::fetch(bool &status_change)
ExtMachInst extMachInst;
extMachInst = predecoder.getExtMachInst(thisPC);
- pcOffset = 0;
staticInst = StaticInstPtr(extMachInst,
thisPC.instAddr());
@@ -1188,7 +1187,12 @@ DefaultFetch<Impl>::fetch(bool &status_change)
++fetchedInsts;
if (staticInst->isMacroop())
+ {
curMacroop = staticInst;
+ }
+ else {
+ pcOffset = 0;
+ }
} else {
// We need more bytes for this instruction.
break;
@@ -1196,8 +1200,10 @@ DefaultFetch<Impl>::fetch(bool &status_change)
}
if (curMacroop) {
staticInst = curMacroop->fetchMicroop(thisPC.microPC());
- if (staticInst->isLastMicroop())
+ if (staticInst->isLastMicroop()) {
curMacroop = NULL;
+ pcOffset = 0;
+ }
}
DynInstPtr instruction =