summaryrefslogtreecommitdiff
path: root/src/cpu
diff options
context:
space:
mode:
authorAli Saidi <Ali.Saidi@ARM.com>2012-06-05 13:52:30 -0400
committerAli Saidi <Ali.Saidi@ARM.com>2012-06-05 13:52:30 -0400
commit20d25b9da77cc681ef7d5bb101438bc0b0c6827c (patch)
treeda0bfc97bc139abecaa7dfd4cbe85d7387cb1da7 /src/cpu
parentc06970b673181aa1032210b60ad799eb97105ae5 (diff)
downloadgem5-20d25b9da77cc681ef7d5bb101438bc0b0c6827c.tar.xz
ISA: Back-out NoopMachInst as a StaticInstPtr change.
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/o3/fetch_impl.hh3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 40fe5ae01..b6eb25c08 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -661,7 +661,8 @@ DefaultFetch<Impl>::finishTranslation(Fault fault, RequestPtr mem_req)
DPRINTF(Fetch, "[tid:%i]: Translation faulted, building noop.\n", tid);
// We will use a nop in ordier to carry the fault.
- DynInstPtr instruction = buildInst(tid, TheISA::NoopStaticInst,
+ DynInstPtr instruction = buildInst(tid,
+ decoder[tid]->decode(TheISA::NoopMachInst, fetchPC.instAddr()),
NULL, fetchPC, fetchPC, false);
instruction->setPredTarg(fetchPC);